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Part: HYB5118165BJ-70
Category:
Analog & Mixed-Signal Processing
-> Amplifiers
-> High Dynamic Range Amplifiers
Description: 1m X 16-bit Dynamic RAM 1k & 4k Refresh
Company: Siemens (acquired by Infineon Technologies Corporation)
Datasheet: Download HYB5118165BJ-70 datasheet File size : 391 kB
Request For quote: Find where to buy HYB5118165BJ-70
Datasheet text preview:
1M x 16-Bit Dynamic RAM 1k & 4k Refresh (Hyper Page Mode- EDO)
Advanced Information
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HYB5116165BSJ -50/-60/-70 HYB5118165BSJ -50/-60/-70
1 048 576 words by 16-bit organization 0 to 70 °C operating temperature Performance: -50 tRAC tCAC tAA tRC tHPC RAS access time CAS access time Access time from address Read/Write cycle time Hyper page mode (EDO) cycle time 50 13 25 84 20 -60 60 15 30 104 25 -70 70 20 35 124 30 ns ns ns ns ns
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Single + 5 V (± 10 %) supply Low power dissipation max. 1100 active mW ( HYB5118165BSJ-50) max. 990 active mW ( HYB5118165BSJ-60) max. 880 active mW ( HYB5118165BSJ-70) max. 550 active mW ( HYB5116165BSJ-50) max. 495 active mW ( HYB5116165BSJ-60) max. 440 active mW ( HYB5116165BSJ-70) 11 mW standby (TTL) 5.5. mW standby (MOS) Output unlatched at cycle end allows two-dimensional chip selection Read, write, read-modify-write, CAS-before-RAS refresh, RAS-only refresh, hidden refresh and Self Refresh Hyper page mode (EDO) capability All inputs, outputs and clocks fully TTL-compatible 1024 refresh cycles / 16 ms for HYB5118165BSJ (1k-Refresh) 4096 refresh cycles / 64 ms for HYB5116165BSJ (4k-Refresh) Plastic Package: P-SOJ-42-1 400 mil
Semiconductor Group
1
1.96
HYB 5116(8)165BSJ-50/-60/-70 1M x 16-EDO DRAM
The HYB 5116(8)165BSJ is a 16 MBit dynamic RAM organized as 1 048 576 words by 16-bits. The HYB 5116(8)165BSJ utilizes a submicron CMOS silicon gate process technology, as well as advanced circuit techniques to provide wide operating margins, both internally and for the system user. Multiplexed address inputs permit the HYB 5116(8)165BSJ to be packaged in a standard SOJ 42 plastic package with 400 mil width. These packages provide high system bit densities and are compatible with commonly used automatic testing and insertion equipment. System-oriented features include single + 5 V (± 10 %) power supply, direct interfacing with high-performance logic device families such as Schottky TTL. Ordering Information Type HYB 5116165BJ-50 HYB 5116165BJ-60 HYB 5116165BJ-70 HYB 5118165BJ-50 HYB 5118165BJ-60 HYB 5118165BJ-70 Pin Names A0-A9 A0-A9 A0-A11 A0 to A7 RAS OE I/O1-I/O16 UCAS LC AS WE Row Address Inputs for HYB5118165BSJ Column Address Inputs for HYB5118165BSJ Row Address Inputs for HYB5116165BSJ Column Address Inputs for HYB5116165BSJ Row Address Strobe Output Enable Data Input/Output Upper Column Address Strobe Lower Column Address Strobe Read/Write Input Power Supply (+ 5 V) Ground (0 V) not connected Ordering Code on request on request on request Q67100-Q1107 Q67100-Q1108 Q67100-Q1109 Package P-SOJ-42-1 400 mil P-SOJ-42-1 400 mil P-SOJ-42-1 400 mill P-SOJ-42-1 400 mil P-SOJ-42-1 400 mil P-SOJ-42-1 400 mil Descriptions DRAM (access time 50 ns) DRAM (access time 60 ns) DRAM (access time 70 ns) DRAM (access time 50 ns) DRAM (access time 60 ns) DRAM (access time 70 ns)
VCC VSS
N .C.
Semiconductor Group
2
HYB 5116(8)165BSJ-50/-60/-70 1M x 16-EDO DRAM
P-SOJ-42-1
400 mil
Vcc I/O1 I/O2 I/O3 I/O4 Vcc I/O5 I/O6 I/O7 I/O8 N.C. N.C. WE RAS N.C. N.C. A0 A1 A2 A3 Vcc
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 HYB3118165BSJ
42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
Vss I/O16 I/O15 I/O14 I/O13 Vss I/O12 I/O11 I/O10 I/O9 N.C. LCAS UCAS OE A9 A8 A7 A6 A5 A4 Vss
Vcc I/O1 I/O2 I/O3 I/O4 Vcc I/O5 I/O6 I/O7 I/O8 N.C. N.C. WE RAS A11 A10 A0 A1 A2 A3 Vcc
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 HYB3116165BSJ
42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22
Vss I/O16 I/O15 I/O14 I/O13 Vss I/O12 I/O11 I/O10 I/O9 N.C. LCAS UCAS OE A9 A8 A7 A6 A5 A4 Vss
Pin Configuration
Semiconductor Group
3
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