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Part: HYB3165800J-50
Category:
Analog & Mixed-Signal Processing
-> Amplifiers
-> High Dynamic Range Amplifiers
Description: 8m X 8-bit Dynamic RAM
Company: Siemens (acquired by Infineon Technologies Corporation)
Datasheet: Download HYB3165800J-50 datasheet File size : 1211 kB
Request For quote: Find where to buy HYB3165800J-50
Datasheet text preview:
8M x 8-Bit Dynamic RAM ( 4k & 8k Refresh)
HYB 3164800AJ/AT(L) -40/-50/-60 HYB 3165800AJ/AT(L) -40/-50/-60
Advanced Information
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8 388 608 words by 8-bit organization 0 to 70 °C operating temperature Fast Page Mode operation Performance: -40 tRAC tCAC tAA tRC tPC RAS access time CAS access time Access time from address Read/write cycle time 40 10 20 75 -50 50 13 25 90 35 -60 60 15 30 110 40 ns ns ns ns ns
Fast page mode cycle time 30
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Single + 3.3 V (± 0.3V) power supply Low power dissipation: max. 396 mW active ( HYB 3164800AJ/AT(L) -40) max. 324 mW active ( HYB 3164800AJ/AT(L) -50) max. 270 mW active ( HYB 3164800AJ/AT(L) -60) max. 558 mW active ( HYB 3165800AJ/AT(L) -40) max. 468 mW active ( HYB 3165800AJ/AT(L) -50) max. 378 mW active ( HYB 3165800AJ/AT(L) -60) 7.2 mW standby (LVTTL) 3.24 mW standby (LVCMOS) 720 µW standby for L-versions Read, write, read-modify-write, CAS-before-RAS refresh (CBR), RAS-only refresh, hidden refresh and self refresh (L-version only)
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8192 refresh cycles/128 ms , 13 R/ 10C addresses (HYB 3164800AJ/AT) 4096 refresh cycles/ 64 ms , 12 R/ 11C addresses (HYB 3165800AJ/AT) · 256 msec refresh period for L-versions
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Plastic Package:
P-SOJ-32-1 400 mil P-TSOPII-32-1 400 mil
HYB 3164(5)800AJ HYB 3164(5)800AT(L)
Semiconductor Group
1
6.97
HYB3164(5)800A J/AT(L)-40/-50/-60 8M x 8-DRAM
This device is a 64 MBit dynamic RAM organized 8 388 608 by 8 bits. The device is fabricated in an advanced second generation 64Mbit 0,35 µm CMOS silicon gate process technology. The circuit and process design allow this device to achieve high performance and low power dissipation. This DRAM operates with a single 3.3 +/-0.3V power supply and interfaces with either LVTTL or LVCMOS levels. Multiplexed address inputs permit the HYB 3164(5)800AJ/AT to be packaged in a 400mil wide SOJ-32 or TSOP-32 plastic package. These packages provide high system bit densities and are compatible with commonly used automatic testing and insertion equipment. The HYB3164(5)800ATL parts (L-versions) have a very low power ,,sleep mode" supported by Self Refresh Ordering Information Type
HY B 3164800AJ-40 HY B 3164800AJ-50 HY B 3164800AJ-60 HY B 3164800AT-40 HY B 3164800AT-50 HY B 3164800AT-60 HY B 3165800AJ-40 HY B 3165800AJ-50 HY B 3165800AJ-60 HY B 3165800AT-40 HY B 3165800AT-50 HY B 3165800AT-60 HY B 3164(5)800ATL
Ordering Code
Package
P-SOJ-32-1 P-SOJ-32-1 P-SOJ-32-1 P-TSOPII-32-1 P-TSOPII-32-1 P-TSOPII-32-1 P-SOJ-32-1 P-SOJ-32-1 P-SOJ-32-1 P-TSOPII-32-1 P-TSOPII-32-1 P-TSOPII-32-1 P-TSOPII-32-1 400 mil 400 mil 400 mil 400 mil 400 mil 400 mil 400 mil 400 mil 400 mil 400 mil 400 mil 400 mil 400 mil
Descriptions
DRAM (access time 40 ns) DRAM (access time 50 ns) DRAM (access time 60 ns) DRAM (access time 40 ns) DRAM (access time 50 ns) DRAM (access time 60 ns) DRAM (access time 40 ns) DRAM (access time 50 ns) DRAM (access time 60 ns) DRAM (access time 40 ns) DRAM (access time 50 ns) DRAM (access time 60 ns) Low Power DRAMs
Pin Names A0-A12 A0-A11 R AS OE I/O1-I/O8 C AS WE Vcc Vss Address Inputs for 8k-refresh versions HYB 3164800AJ/AT(L) Address Inputs for 4k-refresh versions HYB 3165800AJ/AT(L) Row Address Strobe Output Enable Data Input/Output Column Address Strobe Read/Write Input Power Supply ( + 3.3V) Ground
Semiconductor Group
2
HYB3164(5)800A J/AT(L)-40/-50/-60 8M x 8-DRAM
P-SOJ-32-1 (400 mil) P-TSOPII-32-1 (400 mil)
VCC I/O1 I/O2 I/O3 I/O4 N.C. VCC WRITE RAS . A0 A1 A2 A3 A4 A5 VCC
O 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
VSS I/O8 I/O7 I/O6 I/O5 VSS CAS OE A12 / N.C. * A11 A10 A9 A8 A7 A6 VSS
* Pin 24 is A12 for HYB 3164800AJ/AT(L) and N.C. for HYB 3165800AJ/AT(L) Pin Configuration
Semiconductor Group
3
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