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Part: M23L416256A-55

Category:
 Memory
   -> SRAM

Description: Org. = 256KbX16 ;; Description = L.p.sram 3V ;; Speed = 55/70ns ;; Package = 48BGA

Company: EliteMT

Datasheet: Download M23L416256A-55 datasheet     File size : 24 kB

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Datasheet text preview:
ESMT
SRAM
M23L416256A
256K x 16 Bit
SUPER LOW POWER/VOLTAGE CMOS SRAM
Features
Operating voltage: 2.7V to 3.6V Access times: 55 / 70 ns (max.) Wide operating temperature range : - Industrial grade : -40°C to + 85°C Full static operation, no clock or refreshing required All inputs and outputs are directly TTL-compatible Common I/O using three-state output Data retention voltage: 1.5V (min.) Available in 48-ball 6x8mm Mini-BGA packages
Ordering Information
44-pin 400mil TSOP ( Type II ) 48-ball 6x8mm Mini-BGA Product No.
M23L416256A ­ 55 SB*1 M23L416256A ­ 70 SB*1 M23L416256A ­ 55 LB M23L416256A ­ 70 LB*1
*1
Operating Voltage
Operating Temperature
Operating Current Icc1 (max.)
Standby Current Isb1 ( max.)
10 uA
Packing Type
+2.7V ~ +3.6V
-40°C ~ +85°C
45 mA 40 uA
6 x 8 mm Mini-BGA
Notes *1 : S means Super Low Power , L means Low Power.
General Description
The M23L416256A is a low operating current 4,194,304bit static random access memory organized as 262,144 words by 16 bits and operates on low power voltage from 2.7V to 3.6V. It is built using high performance CMOS process. Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures. The chip enable input is provided for POWER-DOWN, device enable. Two byte enable inputs and an output enable input are included for easy interfacing. Data retention is guaranteed at a power supply voltage as low as 1.5V.
Pin Configurations
Mini-BGA 48-ball Top View
1 A B C D E F G H LB I/O9 I/O10 GND VCC I/O15 I/O16 NC
2 OE HB I/O11 I/O12 I/O13 I/O14 NC A8
3 A0 A3 A5 A17 NC A14 A12 A9
4 A1 A4 A6 A7 A16 A15 A13 A10
5 A2 CE I/O2 I/O4 I/O5 I/O6 WE A11
6 NC I/O1 I/O3 VCC GND I/O7 I/O8 NC
Elite Semiconductor Memory Technology Inc.
Publication Date : Mar. 2003 Revision : 1.0 1/12
ESMT
Block Diagram
A0
Preliminary
M23L416256A
VCC GND DECODER 512 X 8192 MEMORY ARRAY
A16
A17
I/O1 COLUMN I/O INPUT DATA CIRCUIT
I/O9
INPUT DATA CIRCUIT
I/O8
I/O16
CE LB HB OE WE
CONTROL CIRCUIT
Pin Description
Symbol A0 - A17 Description Address Inputs Symbol Description Higher Byte Enable Input (I/O9 - I/O16) Output Enable Power Supply Ground No Connection
HB
CE
I/O1 - I/O16
Chip Enable Data Input / Output Write Enable Input Low Byte Enable Input (I/O1 ­ I/O8)
OE
VCC GND NC
WE LB
Elite Semiconductor Memory Technology Inc.
Publication Date : Mar. 2003 Revision : 1.0 2/12
ESMT
Truth Table
CE
H X
Preliminary
M23L416256A
OE
X X
WE
X X
LB
X H L
HB
X H L H L L H L X
I/O1 to I/O8 Mode Not selected High ­ Z Read Read High ­ Z Write Write High ­ Z High ­ Z
I/O9 to I/O16 Mode Not selected High ­ Z Read High ­ Z Read Write High ­ Z Write High ­ Z
VCC Current ISB1, ISB ISB1, ISB ICC1, ICC2, ICC ICC1, ICC2, ICC ICC1, ICC2, ICC ICC1, ICC2, ICC ICC1, ICC2, ICC ICC1, ICC2, ICC ICC1, ICC2, ICC
L
L
H
L H L
L
X
L
L H
L
H
H
X
Note: X = H or L
Recommended DC Operating Conditions ( TA = -40°C to + 85°C )
Symbol VCC GND VIH VIL Parameter Supply Voltage Ground Input High Voltage Input Low Voltage Min. 2.7 0 2.2 -0.3 Typ. 3 0 Max. 3.6 0 VCC + 0.3 +0.6 Unit V V V V
Capacitance ( TA = 25°C, f = 1.0MHz )
Symbol CIN* CI/O* Parameter Input Capacitance Input / Output Capacitance Conditions VIN = 0V VI/O = 0V Min. Max. 6 8 Unit pF pF
* These parameters are sampled and not 100% tested.
Elite Semiconductor Memory Technology Inc.
Publication Date : Mar. 2003 Revision : 1.0 3/12


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