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Part: DAC707
Category: Data Conversion -> DAC (Digital to Analog Converters) -> >14 bit -> 16 bit
Description:
Company: Texas Instruments, Inc.
Datasheet: Download DAC707 datasheet File size : 475 kB
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DAC707 DAC708 DAC709
Microprocessor-Compatible 16-BIT DIGITAL-TO-ANALOG CONVERTERS
FEATURES
q TWO-CHIP CONSTRUCTION q HIGH-SPEED 16-BIT PARALLEL, 8-BIT (BYTE) PARALLEL, AND SERIAL INPUT MODES q DOUBLE-BUFFERED INPUT REGISTER CONFIGURATION q VOUT AND IOUT MODELS q HIGH ACCURACY: Linearity Error ±0.003% of FSR max Differential Linearity Error ±0.006% of FSR max q MONOTONIC (TO 14 BITS) OVER SPECIFIED TEMPERATURE RANGE q HERMETICALLY SEALED q LOW COST PLASTIC VERSIONS AVAILABLE (DAC707JP/KP)
DESCRIPTION
The DAC708 and DAC709 are 16-bit converters designed to interface to an 8-bit microprocessor bus. 16bit data is loaded in two successive 8-bit bytes into parallel 8-bit latches before being transferred into the D/A latch. The DAC708 and DAC709 are current and voltage output models respectively and are in 24-pin hermetic DIPs. Input coding is Binary Two's Complement (bipolar) or Unipolar Straight Binary (unipolar, when an external logic inverter is used to invert the MSB). In addition, the DAC708/709 can be loaded serially (MSB first). The DAC707 is designed to interface to a 16-bit bus.
8-Bit (DAC708, 709) or 16-Bit (DAC707) Serial Data Low Byte Latch High Byte Latch D/A Latch Reference Circuit 16-Bit D/A Converter Bipolar Offset
Data is written into a 16-bit latch and subsequently the D/A latch. The DAC707 has bipolar voltage output and input coding is Binary Two's Complement (BTC). All models have Write and Clear control lines as well as input latch enable lines. In addition, DAC708 and DAC709 have Chip Select control lines. In the bipolar mode, the Clear input sets the D/A latch to give zero voltage or current output. They are all 14-bit accurate and are complete with reference, and for the DAC707, and DAC709, a voltage output amplifier. All models are available with an optional burn-in screening.
Summing Junction (708, 709) 10V Range (708, 709)
Serial (DAC708, 709)
VOUT
Latch Enables/ Mode Select CLEAR WRITE CHIP SELECT
Control Logic
DAC707 or DAC709 Only
DAC707/708/709 Block Diagram
International Airport Industrial Park · Mailing Address: PO Box 11400, Tucson, AZ 85734 · Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 · Tel: (520) 746-1111 · Twx: 910-952-1111 Internet: http://www.burr-brown.com/ · FAXLine: (800) 548-6133 (US/Canada Only) · Cable: BBRCORP · Telex: 066-6491 · FAX: (520) 889-1510 · Immediate Product Info: (800) 548-6132
PDS-557H
SBAS145
SPECIFICATIONS
ELECTRICAL
At TA = +25°C, VCC = ±15V, VDD = +5V, and after a 10-minute warm-up, unless otherwise noted. DAC707/708/709KH, DAC707KP MAX MIN TYP MAX MIN DAC707/708/ 709BH, SH TYP MAX UNITS
DAC707JP PRODUCT INPUT DIGITAL INPUT Resolution Bipolar Input Code (all models) Unipolar Input Code(1) (DAC708/709 only) Logic Levels(2): VIH VIL IIH (VI = +2.7V) IIL (VI = +0.4V) TRANSFER CHARACTERISTICS ACCURACY(3) Linearity Error Differential Linearity Error(5) at Bipolar Zero(5, 6) Gain Error(7) Zero Error(7) Monotonicity Over Spec Temp Range Power Supply Sensitivity: +VCC, VCC VDD DRIFT (Over Spec Temp Range(3)) Total Error Over Temp Range(8) Total Full Scale Drift Gain Drift Zero Drift: Unipolar (DAC708/709 only) Bipolar (all models) Differential Linearity Over Temp(5) Linearity Error Over Temp(5) SETTLING TIME (to ±0.003% of FSR)(9) Voltage Output Models Full Scale Step (2k load) 1LSB Step at Worst Case Code(10) Slew Rate Current Output Models Full Scale Step (2mA): 10 to 100 Load 1k Load OUTPUT VOLTAGE OUTPUT MODELS Output Voltage Range DAC709: Unipolar (USB Code) Bipolar (BTC Code) DAC707 Bipolar (BTC Code) Output Current Output Impedance Short Circuit to Common Duration CURRENT OUTPUT MODELS Output Current Range (±30% typ) DAC708: Unipolar (USB Code) Bipolar (BTC Code) Unipolar Output Impedance (±30% typ) Bipolar Output Impedance (±30% typ) Compliance Voltage ±0.003 ±0.0045 ±0.07 ±0.05 13 ±0.0015 ±0.0001 ±0.08 ±10 ±10 ±5 ±0.006 ±0.001 ±0.006 ±0.012 ±0.30 ±0.1 16 Binary Two's Complement +2.0 1.0 +5.5 +0.8 1 1 MIN TYP
* * Unipolar Straight Binary * * * * * *
* * * * * * * * *
Bits
V V µA µA
±0.0015 ±0.003 ±0.003 * * 14 * * * * * ±2.5 *
±0.003 ±0.006 ±0.006 ±0.15 * 14 * * ±0.15 ±25 ±25 ±5 ±12 +0.009, 0.006 ±0.006
* * ±0.0015 ±0.05 * * * * * ±7 ±1.5 ±4
* * ±0.003 ±0.10 * ±0.003 * ±0.10 ±15 ±15 ±3 ±10 * *
% of FSR(4) % of FSR % of FSR % % of FSR Bits % of FSR/%VCC % of FSR/%VDD % of FSR ppm of FSR/°C ppm/°C ppm of FSR/°C ppm of FSR/°C % of FSR % of FSR
±30 ±15 ±0.012 ±0.012
4 2.5 10
* * * 350 1
8 4
* * * * *
8 4
µs µs V/µs ns µs
±5
±10 * 0.15 Indefinite
0 to +10 ±5, ±10 * * * *
* * * * *
V V V mA
0 to 2 ±1 4.0 2.45 ±2.5
* * * * *
mA mA k k V
The information provided herein is believed to be reliable; however, BURR-BROWN assumes no responsibility for inaccuracies or omissions. BURR-BROWN assumes no responsibility for the use of this information, and all use of such information shall be entirely at the user's own risk. Prices and specifications are subject to change without notice. No patent rights or licenses to any of the circuits described herein are implied or granted to any third party. BURR-BROWN does not authorize or warrant any BURR-BROWN product for use in life support devices and/or systems.
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DAC707/708/709
2
ELECTRICAL (CONT)
At TA = +25°C, VCC = ±15V, VDD = +5V, and after a 10-minute warm-up, unless otherwise noted. DAC707/708/709KH, DAC707KP MAX MIN TYP MAX MIN DAC707/708/ 709BH, SH TYP MAX UNITS
DAC707JP PRODUCT POWER SUPPLY REQUIREMENTS Voltage (all models): +VCC VCC VDD Current (No Load, +15V Supplies) Current Output Models: +VCC VCC VDD Voltage Output Models: +VCC VCC VDD Power Dissipation (±15V supplies) Current Output Models Voltage Output Models TEMPERATURE RANGE Specification: BH Grades JP, KP, KH Grades SH Grades Storage: Ceramic Plastic +13.5 13.5 +4.5 +15 15 +5 +16.5 16.5 +5.5 MIN TYP
* * *
* * * +10 13 +5 * * * 370 *
* * * +25 25 +10 * * * 800 950
* * *
* * * * * * * * * * *
* * * * * * * * * * *
V V V mA mA mA mA mA mA mW mW
+16 18 +5
+30 30 +10
535
25 0 +70 * 65 * * +150 * 55 65
+85 +125 +150
60
+100
°C °C °C °C °C
*Specification same as for models in column to the left. NOTES: (1) MSB must be inverted externally prior to DAC708/709 input. (2) Digital inputs are TTL, LSTTL, 54/74C, 54/74HC and 54/74HTC compatible over the specified temperature range. (3) DAC708 (current-output models) are specified and tested with an external output operational amplifier connected using the internal feedback resistor in all tests. (4) FSR means Full Scale Range. For example, for ±10V output, FSR = 20V. (5) ±0.0015% of Full Scale Range is equal to 1 LSB in 16-bit resolution, ±0.003% of Full Scale Range is equal to 1 LSB in 15-bit resolution. ±0.006% of Full Scale Range is equal to 1 LSB in 14-bit resolution. (6) Error at input code 0000H. (For unipolar connection on DAC708/709, the MSB must be inverted externally prior to D/A input.) (7) Adjustable to zero with external trim potentiometer. Adjusting the gain potentiometer rotates the transfer function around the bipolar zero point. (8) With gain and zero errors adjusted to zero at +25°C. (9) Maximum represents the 3 limit. Not 100% tested for this parameter. (10) The bipolar worst-case code change is FFFFH to 0000H and 0000H to FFFFH. For unipolar (DAC708/709 only) it is 7FFFH to 8000H and 8000H to 7FFFH.
PACKAGE INFORMATION
PRODUCT DAC707JP DAC707KP DAC707BH DAC707KH DAC707SH DAC708BH DAC708KH DAC708SH DAC709BH DAC709KH DAC709SH PACKAGE 28-Pin Plastic DBL Wide DIP 28-Pin Plastic DBL Wide DIP 28LD Side Brazed Hermetic Dip 28LD Side Brazed Hermetic DIP 28LD Side Brazed Hermetic DIP 24LD Side Brazed Hermetic DIP 24LD Side Brazed Hermetic DIP 24LD Side Brazed Hermetic DIP 24LD Side Brazed Hermetic DIP 24LD Side Brazed Hermetic DIP 24LD Side Brazed Hermetic DIP PACKAGE DRAWING NUMBER(1) 215 215 149 149 149 165 165 165 165 165 165
ABSOLUTE MAXIMUM RATINGS
VDD to COMMON ...... 0V, +15V +VCC to COMMON ............ 0V, +18V VCC to COMMON .... 0V, 18V Digital Data Inputs to COMMON .... 0.5V, VDD +0.5 DC Current any input ............ ±10mA Reference Out to COMMON .... Indefinite Short to COMMON VOUT (DAC707, DAC709) ... Indefinite Short to COMMON External Voltage Applied to RF (pin 13 or 14, DAC708) ......... ±18V External Voltage Applied to D/A Output (pin 1, DAC707; pin 14, DAC709) ......... ±5V Power Dissipation ...... 1000mW Storage Temperature ..... 60°C to +150°C Lead Temperature (soldering, 10s) ....... 300°C Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. Exposure to absolute maximum conditions for extended periods may affect device reliability.
ELECTROSTATIC DISCHARGE SENSITIVITY
This integrated circuit can be damaged by ESD. Burr-Brown recommends that all integrated circuits be handled with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage. ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
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NOTE: (1) For detailed drawing and dimension table, please see end of data sheet, or Appendix C of Burr-Brown IC Data Book.
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DAC707/708/709
ORDERING INFORMATION
PRODUCT DAC707JP DAC707JP-BI(1) DAC707KP DAC707KP-BI(1) DAC707KH DAC707KH-BI(1) DAC707BH DAC707BH-BI(1) DAC707SH DAC707SH-BI(1) DAC708KH DAC708BH DAC708SH DAC709KH DAC709BH DAC709SH NOTE: (1) 25 piece minimum order. TEMPERATURE RANGE 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 0°C to +70°C 25°C to +85°C 25°C to +85°C 55°C to +125°C 55°C to +125°C 0°C to +70°C 25°C to +85°C 55°C to +125°C 0°C to +70°C 25°C to +85°C 55°C to +125°C INPUT CONFIGURATION 16-bit port 16-bit port 16-bit port 16-bit port 16-bit port 16-bit port 16-bit port 16-bit port 16-bit port 16-bit port 8-bit port 8-bit port 8-bit port 8-bit port 8-bit port 8-bit port OUTPUT CONFIGURATION ±10V output ±10V output ±10V output ±10V output ±10V output ±10V output ±10V output ±10V output ±10V output ±10V output ±1mA output ±1mA output ±1mA output ±10V output ±10V output ±10V output
CONNECTION DIAGRAMS
DAC708/709 A2 Register Enable Lines A0 A1 D7 (D15) D6 (D14) D5 (D13) Data Inputs D4 (D12) D3 (D11) D2 (D10) D1 (D9) D0 (D8)/S1 DCOM VDD CS WR CLR VCC +VCC GA
(3) (1) (2)
1 2 3 4 5 6 7 8 9 10 11 12 DAC709 Only Low Byte Latch High Byte Latch D/A Latch
24 23 22 21 16-Bit Reference Circuit Ladder Resistor Network and Current Switches 20 19 18 17 16 15 14 10k 10k 13
+ Control Lines
VDD NOTES: (1) Potentiometer is 10k to 100k . (2) Decoupling capcitors are 0.1µF to 1.0µF. VCC
270k + Gain Adjust 3.9M
+VCC +
(1) (2) (2)
BPO SJ ACOM VOUT R F2
+
Offset Adjust Connect for bipolar operation. Connect for 10V range. Leave pin 13 open for 20V range.
DAC707 VDD
(2)
V OUT V DD DCOM ACOM
1 2 3 4 5 6 7 8
Input Latch
28 D0 (LSB) RF 27 D1 26 D2 25 D3 24 D4 23 D5 22 D6 21 D7 16-Bit Ladder Resistor Network and Current Switches 20 D8 19 D9 18 D10 17 D11 16 D12 15 D13 Digital Inputs
Digital Common
Analog Common Offset Adjust
3.9M 270k
(3)
SJ GA +V V
CC CC
(1)
+VCC
Gain Adjust
VCC
(2)
(2)
CLR Control Lines WR A1 Latch Enable Lines A0 (MSB) D15 Digital Inputs NOTES: (1) Potentiometers are 10k to 100k . (2) Decoupling capcitors are 0.1µF to 1.0µF. (3) Bypass, 0.0022µF to 0.01µF. D14
9 10 11 12 13 14
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DAC707/708/709
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D/A Latch
DESCRIPTION OF PIN FUNCTIONS
DAC707 DESIGNATOR VOUT VDD DESCRIPTION Voltage output for DAC707 (±10V) Logic supply (+5V) Pin # 1 2 DESIGNATOR A2 A0 DAC708/709 DESCRIPTION Latch enable for D/A latch (Active low) Latch enable for "low byte" input (Active low). When both A0 and A1 are logic "0", the serial input mode is selected and the serial input is enabled. Latch enable for "high byte" input (Active low). When both A0 and A1 are logic "0", the serial input mode is selected and the serial input is enabled. Input for data bit 7 if enabling low byte (LB) latch or data bit 15 if enabling the high byte (HB) latch. Input for data bit 6 if enabling LB latch or data bit 14 if enabling the HB latch.
DCOM
Digital common
3
A1
ACOM SJ
Analog common Summing junction of the internal output op amp for the DAC707. Offset adjust circuit is connected to the summing junction of the output amplifier. Refer to Block Diagram. Gain adjust pin. Refer to Connection Diagram for gain adjust circuit. Positive supply voltage (+15V) Negative supply voltage (15V) Clear line. Sets the input latch to zero and sets the D/A latch to the input code that gives bipolar zero on the D/A output (Active low) Write control line (Active low) Enable for D/A converter latch (Active low) Enable for input latch (Active low) Data bit 15 (Most Significant Bit)
4 5
D7 (D15) D6 (D14)
GA +VCC VCC CLR
6 7 8 9
D5 (D13) D4 (D12) D3 (D11) D2 (D10)
Data bit 5 (LB) or data bit 13 (HB) Data bit 4 (LB) or data bit 12 (HB) Data bit 3 (LB) or data bit 11 (HB) Data bit 2 (LB) or data bit 10 (HB)
WR A1 A0 D15 (MSB)
10 11 12 13
D1 (D9) D0 (D8)/SI DCOM R F2
Data bit 1 (LB) or data bit 9 (HB) Data bit 0 (LB) or data bit 8 (HB). Serial input when serial mode is selected. Digital common Feedback resistor for internal or external operational amplifier. Connect to pin 14 when a 10V output range is desired. Leave open for a 20V output range. Voltage output for DAC709 or feedback resistor for use with an external output op amp for the DAC708. Refer to Connection Diagram for connection of external op amp to DAC708. Analog common Summing junction of the internal output op amp for the DAC709, or the current output for the DAC708. Refer to Connection Diagram for connection of external op amp to DAC708. Bipolar offset. Connect to pin 16 when operating in the bipolar mode. Leave open for unipolar mode. Gain adjust pin Positive supply voltage (+15V) Negative supply voltage (15V) Clear line. Sets the high and low byte input registers to zero and, for bipolar operation, sets the D/A register to the input code that gives bipolar zero on the D/A output. (In the unipolar mode, invert the MSB prior to the D/A.) Write control line Chip select control line Logic supply (+5V)
D14
Data bit 14
14
VOUT RF1 (DAC708)
D13 D12
Data bit 13 Data bit 12
15 16
ACOM SJ (DAC709) IOUT (DAC708)
D11 D10 D9 D8 D7
Data bit 11 Data bit 10 Data bit 9 Data bit 8 Data bit 7
17 18 19 20 21
BPO GA +VCC VCC CLR
D6 D5 D4 D3 D2 D1 D0 (LSB)
Data bit 6 Data bit 5 Data bit 4 Data bit 3 Data bit 2 Data bit 1 Data bit 0 (Least Significant Bit)
22 23 24 25 26 27 28
WR CS VDD No pin No pin No pin No pin
(The DAC708 and DAC709 are in 24-pin packages)
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5
DAC707/708/709
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