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Part: AM26LV32CNSLE
Category:
Interface and Interconnect
-> RS-422
Description: ti AM26LV32, Low-voltage High-speed Quadruple Differential Line Receiver
Company: Texas Instruments, Inc.
Datasheet: Download AM26LV32CNSLE datasheet File size : 679 kB
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Datasheet text preview:
AM26LV32 LOW-VOLTAGE HIGH-SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D MAY 1995 REVISED APRIL 2000
D D D D D D D D D
Switching Rates up to 32 MHz Operates from a Single 3.3-V Supply Ultra-Low Power Dissipation . . . 27 mW Typ Open-Circuit, Short-Circuit, and Terminated Fail-Safe 0.3-V to 5.5-V Common-Mode Range With ± 200 mV Sensitivity Accepts 5-V Logic Inputs With a 3.3-V VCC Input Hysteresis . . . 50 mV Typ 235 mW With Four Receivers at 32 MHz Pin-to-Pin Compatible With AM26C32, AM26LS32, and MB570
D OR NS PACKAGE (TOP VIEW)
1B 1A 1Y G 2Y 2A 2B GND
1 2 3 4 5 6 7 8
16 15 14 13 12 11 10 9
VCC 4B 4A 4Y G 3Y 3A 3B
The NS package is only available left-ended taped and reeled.
description
The AM26LV32, BiCMOS, quadruple, differential line receiver with 3-state outputs is designed to be similar to TIA/EIA-422-B and ITU Recommendation V.11 receivers with reduced common-mode voltage range due to reduced supply voltage. The device is optimized for balanced bus transmission at switching rates up to 32 MHz. The enable function is common to all four receivers and offers a choice of active-high or active-low inputs. The 3-state outputs permit connection directly to a bus-organized system. Each device features receiver high input impedance and input hysteresis for increased noise immunity, and input sensitivity of ± 200 mV over a common-mode input voltage range from 0.3 V to 5.5 V. When the inputs are open circuited, the outputs are in the high logic state. This device is designed using the Texas Instruments (TITM) proprietary LinIMPACT-C60TM technology, facilitating ultra-low power consumption without sacrificing speed. This device offers optimum performance when used with the AM26LV31 quadruple line drivers. The AM26LV32C is characterized for operation from 0°C to 70°C.
FUNCTION TABLE (each receiver) DIFFERENTIAL INPUT VID 0.2 V 0.2 V < VID < 0.2 V VID 0.2 V Open, shorted, or terminated X ENABLES G H X H X H X H X L G X L X L X L X L H OUTPUT H H ? ? L L H H Z
H = high level, L = low level, X = irrelevant, Z = high impedance (off), ? = indeterminate See application information attached.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LinIMPACT-C60 and TI are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
Copyright © 2000, Texas Instruments Incorporated
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
1
AM26LV32 LOW-VOLTAGE HIGH-SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D MAY 1995 REVISED APRIL 2000
logic symbol
G G 4 12 1 EN
logic diagram (positive logic)
G G 1A 4 12 2 1 3 1Y
1A 1B 2A 2B 3A 3B 4A 4B
2 1 6 7 10 9 14 15
3
1B 1Y 2A
6 7 5 2Y
5 11 13
2Y 3Y
2B
3A 4Y 3B
10 9 11 3Y
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
4A 4B
14 15 13 4Y
schematics of equivalent inputs and outputs
EQUIVALENT OF EACH INPUT (A, B) VCC 7.2 k VCC EQUIVALENT OF EACH ENABLE INPUT (G, G) TYPICAL OF ALL OUTPUTS (Y) VCC
1.5 k A, B 15 k 1.5 k
Enable G, G
100 Y
7.2 k GND GND GND
2
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
AM26LV32 LOW-VOLTAGE HIGH-SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D MAY 1995 REVISED APRIL 2000
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 6 V Input voltage range, VI (A or B inputs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 V to 8 V Differential input voltage, VID (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±12 V Enable input voltage range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 6 V Output voltage range, VO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V to 6 V Maximum output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA Package thermal impedance, JA (see Note 3): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73°C/W NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64°C/W Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65°C to 150°C
Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. All voltage values are with respect to the GND terminal. 2. Differential input voltage is measured at the noninverting input with respect to the corresponding inverting input. 3. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions
MIN Supply voltage, VCC High-level input voltage, VIH(EN) Low-level input voltage, VIL(EN) Common-mode input voltage, VIC Differential input voltage, VID High-level output current, IOH Low-level output current, IOL Operating free-air temperature, TA AM26LV32C 0 0.3 3 2 0.8 5.5 ± 5.8 5 5 70 mA mA °C NOM 3.3 MAX 3.6 UNIT V V V V
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
3
AM26LV32 LOW-VOLTAGE HIGH-SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D MAY 1995 REVISED APRIL 2000
electrical characteristics over recommended supply-voltage and operating free-air temperature ranges (unless otherwise noted)
PARAMETER VIT+ VIT VIK VOH VOL IOZ IIH(E) IIL(E) rI II ICC Differential input high-threshold voltage Differential input low-threshold voltage Enable input clamp voltage High-level output voltage Low-level output voltage High-impedance-state output current High-level enable input current Low-level enable input current Input resistance Input current Supply current VI = 5.5 V or 0.3 V, VI(E) = VCC or GND, All other inputs GND No load, line inputs open 8 150 II = 18 mA VID = 200 mV, VID = 200 mV, VO = 0 to VCC VCC = 0 or 3 V, VCC = 3.6 V, IOH = 5 mA IOL = 5 mA VI = 5.5 V VI = 0 V 7 12 ±700 17 0.2 0.8 2.4 3.2 0.17 0.5 ±50 10 10 1.5 TEST CONDITIONS MIN TYP MAX 0.2 UNIT V V V V V µA µA k µA mA pF
Cpd Power dissipation capacitance One channel All typical values are at VCC = 3.3 V and TA = 25°C. Cpd determines the no-load dynamic current: IS = Cpd × VCC × f + ICC.
switching characteristics, VCC = 3.3 V, TA = 25°C
PARAMETER tPLH tPHL tt tPZH tPZL tPHZ tPLZ tsk(p)§ tsk(o)¶ Propagation delay time, low- to high-level output Propagation delay time, high- to low-level output Transistion time (tr or tf) Output-enable time to high level Output-enable time to low level Output-disable time from high level Output-disable time from low level Pulse skew Pulse skew TEST CONDITIONS See Figure 1 Figure See Figure 1 See Figure 2 See Figure 3 See Figure 2 See Figure 3 MIN 8 8 TYP 16 16 5 17 10 20 16 4 4 40 40 40 40 6 6 MAX 20 20 UNIT ns ns ns ns ns ns ns ns
ns tsk(pp)# Pulse skew (device to device) 6 9 ns § tsk(p) is |tPLH tPHL| of each channel of the same device. ¶ tsk(o) is the maximum difference in propagation delay times between any two channels of the same device switching in the same direction. # tsk(pp) is the maximum difference in propagation delay times between any two channels of any two devices switching in the same direction.
4
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
AM26LV32 LOW-VOLTAGE HIGH-SPEED QUADRUPLE DIFFERENTIAL LINE RECEIVER
SLLS202D MAY 1995 REVISED APRIL 2000
PARAMETER MEASUREMENT INFORMATION
Generator (see Note B) 50 A B 50 Y VO CL = 15 pF (see Note A) A Input B tPLH Output 50% 10% tr 90% 90% tPHL VOH 50% 10% V OL tf 1V 2V
VCC G G (see Note C)
NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: ZO = 50 , PRR = 10 MHz, tr and tf (10% to 90%) 2 ns, 50% duty cycle. C. To test the active-low enable G, ground G and apply an inverted waveform G.
Figure 1. tPLH and tPHL Test Circuit and Voltage Waveforms
A B RL = 2 k G Generator (see Note B) 50 G Y
VID = 1 V
VO CL = 15 pF (see Note A)
VCC (see Note C) VCC Input tPZH 50% 50% 0V tPHZ VOH VOH 0.3 V Voff 0
Output
50%
NOTES: A. CL includes probe and jig capacitance. B. The input pulse is supplied by a generator having the following characteristics: ZO = 50 , PRR = 10 MHz, tr and tf (10% to 90%) 2 ns, 50% duty cycle. C. To test the active-low enable G, ground G and apply an inverted waveform G.
Figure 2. tPZH and tPHZ Test Circuit and Voltage Waveforms
POST OFFICE BOX 655303
· DALLAS, TEXAS 75265
5
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