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Part: S9518S
Category:
Analog & Mixed-Signal Processing
-> Potentiometers
-> Nonvolatile DACPOT Potentiometer
Description: Single 8-Bit Push Button Nonvolatile DACPOT™
Company: Summit Microelectronics, Inc.
Datasheet: Download S9518S datasheet File size : 177 kB
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Datasheet text preview:
SUMMIT
M I C R O E L E C T R O N I C S , Inc.
S9518
Nonvolatile DACPOTTM Electronic Potentiometer With Debounced Push Button Interface
FEATURES
Digitally Controlled Electronic Potentiometer · 8-Bit Digital-to-Analog Converter (DAC) Independent Reference Inputs Differential Non-Linearity of ±0.5LSB max Integral Non-Linearity of ±1LSB max · VOUT Value in EEPROM for Power-On Recall Equivalent to 256-Step Potentiometer · Unity Gain Op Amp Drives up to 1mA · Simple Trimming Adjustment Debounced Pushbutton Interface · Low Noise Operation · "Clickless" Transitions between DAC Steps · No Mechanical Wear-out Problem 1,000,000 Stores (typical) 100 Year Data Retention · Operation from 2.7V to 5.5V Supply · Low Power: 1mW max at 5V
OVERVIEW
The S9518 DACPOT trimmer is an 8-bit nonvolatile DAC designed to replace mechanical potentiometers. The S9518 includes a unity-gain amplifier to buffer the DAC output and enables VOUT to swing from rail to rail. The DACPOT trimmer operates over a supply voltage range of 2.7V to 5.5V. The S9518's simple pushbutton input provides an ideal interface for operator adjusted equipment. This interface allows for quick and easy adjustment of even the most sophisticated systems. The S9518 is a pin-compatible performance upgrade for other industry nonvolatile potentiometers. The S9518 offers double the resolution of these devices and provides `clickless' transitions of VOUT.
FUNCTIONAL BLOCK DIAGRAM
VDD 8 VH
3
8-Bit E2PROM
Debounce Circuit & Write Control Logic
8-Bit Data Register
5 8-Bit DAC
VOUT
6 1 UP# 2 DWN# 7 STR# 4 GND
2017 T BD 5.0
VL
© SUMMIT MICROELECTRONICS, Inc. 2000 · 300 Orchard City Drive, Suite 131 · Campbell, CA 95008 · Phone 408-378-6461 · Fax 408-378-6586 · www.summitmicro.com Characteristics subject to change without notice 2017 5.2 8/2/00
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S9518
PIN NAMES
Symbol UP# DWN# VH GND VOUT VL STR# VDD Description PB input, moves VOUT toward VH input PB input, moves VOUT toward VL input VREF high Ground Trimmed voltage output VREF low Store input, providing a control input to initiate a store operation Supply voltage (2.7V to 5.5V)
2017 Table01 5.0
2017 T PCon 5.0
PINOUT
8-Pin PDIP or 8-Pin SOIC
UP# DWN# VH GND
1 2 3 4
8 7 6 5
VDD STR# VL VOUT
Analog Section The S9518 is an 8-bit, voltage output digital-to-analog converter (DAC). The DAC consists of a resistor network that converts 8-bit digital values into equivalent analog output voltages in proportion to the applied reference voltage. Reference Inputs The voltage differential between the VL and VH inputs sets the full-scale output voltage range. VL must be equal to or greater than ground (a positive voltage). VH must be greater than VL and less than or equal to VDD. See specifications for guaranteed operating limits. Output Buffer Amplifier The voltage output is from a precision unity-gain follower that can slew up to 1V/µs. Digital Interface The interface provides simple pushbutton control of an up/down counter that drives the DAC. The DAC output is a ratiometric voltage output. UP# is an active low pushbutton input. An internal pull-up resistor, with nominal value of 50k, eliminates an external resistor. A 30ms debounce period is included in the input timing to prevent multiple pulsing of the counter. Either a switch closure to ground or a low logic level will, after the debounce time, change the potentiometer tap position. UP# moves the output voltage towards the VH reference input. If the UP# pushbutton is kept depressed the counter will continue to increment at the rate of one count every 250ms for one second. After one second the counter increments faster, one count every 50ms, until the pushbutton is released. Changes to the DAC output using the UP# input do not alter the data stored in EEPROM.
DWN# is an active low pushbutton input that decrements the counter and moves the potentiometer output voltage towards the VL reference input. The DWN# control input also includes an internal 50k pull-up resistor and a 30ms debounce period to prevent multiple pulsing. A low logic level will also change the potentiometer tap position after the debounce period. If the DWN# pushbutton is kept depressed the counter continues to decrement at the rate of one count every 250ms for one second. After one second the counter decrements at one count every 50ms until the pushbutton is released. Changes to the DAC output using the DWN# input do not alter the data stored in EEPROM. STR# This input can be used in two ways: 1) If the input is tied low, then AUTOSTORE is enabled. When VDD powers down, an automatic store cycle takes place that updates the nonvolatile EEPROM memory. 2) STR# is an active low pushbutton input that also updates the nonvolatile memory. The input is debounced but does not have an internal pull-up resistor. For every valid push the S9518 will store the current potentiometer position to EEPROM.
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2017 5.2 8/2/00
SUMMIT MICROELECTRONICS, Inc.
S9518
DEVICE OPERATION
There are five main blocks to the S9518: an 8-bit EEPROM memory; input debounce circuits, control logic, and 8-bit counter; 8-bit data register; decode section and resistor ladder (DAC); and the buffer amplifier. The input control section operates just like an up/down counter. The output of this counter is fed to the data register and then decoded to activate one of 255 electronic switches connected to the resistor ladder. The ladder is comprised of 256 resistors of equal value connected in series. At the bottom of the ladder and at the junctions of the resistors there are electronic switches that transfer the voltage at each point to the buffer amplifier and then to the output. The S9518 is designed to interface directly to two pushbutton switches that effectively move the potentiometer wiper up or down. The UP# and DWN# inputs, respectively, increment or decrement the 8-bit counter. The data input to the DAC is decoded to select one of the 256 wiper positions along the resistive ladder. The wiper increment input UP# and the wiper decrement input DWN# are connected to internal pull-ups so that they normally remain high. When pulled low by an external pushbutton switch or a logic low level input, the wiper will be switched to the next adjacent tap position. Internal debounce circuitry prevents inadvertent switching of the wiper position if UP# or DWN# remain low for less than 30ms (typical). Each of the buttons can be pushed either once for a single increment/decrement or held low continuously for multiple increments/decrements. The number of increments/decrements of the wiper position depends on how long the button is pushed. When making a continuous push, after the first second, the increment/decrement speed increases. For the first second the device will be in the slow scan mode. Then, if the button is held for longer than one second, the device will go into the fast scan mode. As soon as the button is released the S9518 will return to a standby condition. The DAC, whether set to 00HEX or FFHEX, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked up to FFHEX or down to 00HEX. AUTOSTORE The value of the counter is stored in EEPROM memory whenever the chip senses a power-down of VDD while STR# is enabled (held low). When power is restored the contents of the memory are recalled and the counter reset to the last value stored. If AUTOSTORE is to be implemented, STR# is typically hard wired to GND. If STR# is held high during power-up and then taken low the wiper will not respond to the UP# or DWN# inputs until STR# is brought high and the store is complete. See Figure 1. Manual (Pushbutton) Store When STR# is not enabled (held high) a pushbutton switch may be used to pull STR# low and released to perform a manual store of the wiper position in EEPROM memory. See Figure 2. Effect of VDD Removal The resistor ladder, connected between VH and VL, does not change value when VDD is removed. However, the buffer amplifier no longer functions, and consequently a high impedance appears at the VOUT pin.
VDD
VDD
470 1 2 3 4 UP# DWN# VH GND VDD STR# VL VOUT 8 7 6 5
1 2 3 4
22µF
UP# DWN# VH GND
VDD STR# VL VOUT
8 7 6 5 20k
2017 T Fig01 5.1
2017 T Fig02 5.0
Figure 1: Typical circuit with STR store pin used in AUTOSTORE mode
Figure 2: Typical circuit with STR store pin controlled by push button switch
SUMMIT MICROELECTRONICS, Inc.
2017 5.2 8/2/00
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