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Part: M29W200BB70N6
Category:
Description: 2 Mbit (256KB X8 or 128KB X16, Boot BLOCK) Low Voltage Single Supply Flash Memory
Company: ST Microelectronics, Inc.
Datasheet: Download M29W200BB70N6 datasheet File size : 473 kB
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Datasheet text preview:
M29W200BT M29W200BB
2 Mbit (256Kb x8 or 128Kb x16, Boot Block) Low Voltage Single Supply Flash Memory
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SINGLE 2.7 to 3.6V SUPPLY VOLTAGE for PROGRAM, ERASE and READ OPERATIONS ACCESS TIME: 55ns PROGRAMMING TIME 10µs per Byte/Word typical 7 MEMORY BLOCKS 1 Boot Block (Top or Bottom Location) 2 Parameter and 4 Main Blocks
1 44
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s
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PROGRAM/ER ASE CONTROLLER Embedded Byte/Word Program algorithm Embedded Multi-Block/Chip Erase algorithm Status Register Polling and Toggle Bits Ready/Busy Output Pin
TSOP48 (N) 12 x 20mm
SO44 (M)
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ERASE SUSPEND and RESUME MODES Read and Program another Block during Erase Suspend Figure 1. Logic Diagram
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UNLOCK BYPASS PROGRAM COMMAND Faster Production/Batch Programming TEMPORARY BLOCK UNPROTECTION MODE LOW POWER CONSUMPTION Standby and Automatic Standby
17 A0-A16 W E G RP M29W200BT M29W200BB 15 DQ0-DQ14 DQ15A1 BYTE RB
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VCC
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100,000 PROGRAM/ERASE CYCLES per BLOCK 20 YEARS DATA RETENTION Defectivity below 1 ppm/year ELECTRONIC SIGNATURE Manufacturer Code: 0020h Top Device Code M29W200BT: 0051h Bottom Device Code: M29W200BB 0057h
s
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VSS
AI02948
July 2000
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M29W200BT, M29W200BB
Figure 2. TSOP Connections
A15 A14 A13 A12 A11 A10 A9 A8 NC NC W RP NC NC RB NC NC A7 A6 A5 A4 A3 A2 A1 1 48 A16 BYTE VSS DQ15A1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC DQ11 DQ3 DQ10 DQ2 DQ9 DQ1 DQ8 DQ0 G VSS E A0
Figure 3. SO Connections
12 M29W200BT 37 13 M29W200BB 36
NC RB NC A7 A6 A5 A4 A3 A2 A1 A0 E VSS G DQ0 DQ8 DQ1 DQ9 DQ2 DQ10 DQ3 DQ11
1 2 3 4 5 6 7 8 9 10 11 M29W200BT 12 M29W200BB 13 14 15 16 17 18 19 20 21 22
44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23
RP W A8 A9 A10 A11 A12 A13 A14 A15 A16 BYTE VSS DQ15A1 DQ7 DQ14 DQ6 DQ13 DQ5 DQ12 DQ4 VCC
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25
AI02944
AI02945
Table 1. Signal Names
A0-A16 DQ0-DQ7 DQ8-DQ14 DQ15A1 E G W RP RB BYTE VCC VSS NC 2/22 Address Inputs Data Inputs/Outputs Data Inputs/Outputs Data Input/Output or Address Input Chip Enable Output Enable Write Enable Reset/Block Temporary Unprotect Ready/Busy Output Byte/Word Organization Select Supply Voltage Ground Not Connected Internally
SUMMARY DESCRIPTION The M29W200B is a 2 Mbit (256Kb x8 or 128Kb x16) non-volatile memory that can be read, erased and reprogrammed. These operations can be performed using a single low voltage (2.7 to 3.6V) supply. On power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or EPROM. The M29W200B is fully backward compatible with the M29W200. The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Each block can be protected independently to prevent accidental Program or Erase commands from modifying the memory. Program and Erase commands are written to the Command Interface of the memory. An on-chip Program/Erase Controller simplifies the process of programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or erase operation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards.
M29W 200BT, M29W200BB
Table 2. Absolute Maximum Ratings (1)
Symbol TA Ambient Operating Temperature (Temperature Range Option 6) TBIAS TSTG VIO (2) VCC VID Temperature Under Bias Storage Temperature Input or Output Voltage Supply Voltage Identification Voltage 40 to 85 50 to 125 65 to 150 0.6 to 4 0.6 to 4 0.6 to 13.5 °C °C °C V V V Parameter Ambient Operating Temperature (Temperature Range Option 1) Value 0 to 70 Unit °C
Note: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 2. Minimum Voltage may undershoot to 2V during transition and for less than 20ns during transitions.
Table 3. Top Boot Block Addresses M29W200BT
# 6 5 4 3 2 1 0 Size (Kbytes) 16 8 8 32 64 64 64 Address Range (x8) 3C000h-3FFFFh 3A000h-3BFFFh 38000h-39FFFh 30000h-37FFFh 20000h-2FFFFh 10000h-1FFFFh 00000h-0FFFFh Address Range (x16) 1E000h-1FFFFh 1D000h-1DFFFh 1C000h-1CFFFh 18000h-1BFFFh 10000h-17FFFh 08000h-0FFFFh 00000h-07FFFh
Table 4. Bottom Boot Block Addresses M29W200BB
# 6 5 4 3 2 1 0 Size (Kbytes) 64 64 64 32 8 8 16 Address Range (x8) 30000h-3FFFFh 20000h-2FFFFh 10000h-1FFFFh 08000h-0FFFFh 06000h-07FFFh 04000h-05FFFh 00000h-03FFFh Address Range (x16) 18000h-1FFFFh 10000h-17FFFh 08000h-0FFFFh 04000h-07FFFh 03000h-03FFFh 02000h-02FFFh 00000h-01FFFh
The blocks in the memory are asymmetrically arranged, see Tables 3 and 4, Block Addresses. The first or last 64 Kbytes have been divided into four additional blocks. The 16 Kbyte Boot Block can be used for small initialization code to start the microprocessor, the two 8 Kbyte Parameter Blocks can be used for parameter storage and the remaining 32K is a small Main Block where the application may be stored.
Chip Enable, Output Enable and Write Enable signals control the bus operation of the memory. They allow simple connection to most microprocessors, often without additional logic. The memory is offered in TSOP48 (12 x 20mm) and SO44 packages and it is supplied with all the bits erased (set to '1').
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