|
|
Part: M27C4001-80L1X
Category:
Memory
-> EPROM
-> 8 Mb
Description: 4 Mbit 512kb X 8 uv EPROM And OTP EPROM
Company: ST Microelectronics, Inc.
Datasheet: Download M27C4001-80L1X datasheet File size : 45 kB
Request For quote: Find where to buy M27C4001-80L1X
Datasheet text preview:
M27C4001
4 Mbit (512K b x 8) UV EPROM and OTP EP ROM
s
5V ± 10% SUPPLY VOLTAGE in READ OPERATION FAST ACCESS TIME: 35ns LOW PO WER CONSUMPTION: Active Current 30mA at 5MHz Standby Current 100µA
1 32
s s
32
1
s s s
PROG RAMMING VOLTAGE: 12.75V ± 0.25V PROG RAMMING TIME: 100µs/byte (typical) ELECTRONIC SIGNATURE M anufacturer Code: 20h Device Code: 41h
F DIP32W (F )
PDIP 32 (B)
LCCC32W (L)
DESCRIPTION The M 27C4001 is a 4 Mbit EPROM offered in t he two ranges UV (ultra violet erase) and O TP (one time programmable). It is i deally suited for microprocessor s ystems requiring large programs and is organised as 524,288 by 8 bits. The FDIP32W (window ceramic fri t-seal package) and LCCC32W (leadless chip carrier package) have a transparent lid which allow the user to expose the chip to ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure. For applications where the content is programmed only one time and erasure is not required, the M27C4001 is offered in PDIP32, PLCC32 and TSOP32 (8 x 20mm) packages.
PLCC32 (C)
TS OP32 (N) 8 x 20 mm
Figure 1. Logic Diagram
VCC
VPP
19
8 Q0-Q7
Table 1. Signal Names
A 0-A18 Q 0-Q7 E G VPP VCC VSS Address Inputs Dat a Out puts
A0-A18
E G
M27C4001
Chip Enable Out put E nable Pro gram Supply Supply Voltage Gro und
VSS
AI00721B
July 1998
1/16
M27C4001
Figure 2A. DIP Pin Connections Figure 2B. LCC Pin Connections
VPP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2 VSS
1 2 3 4 5 6 7 8 M27C4001 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
VCC A18 A17 A14 A13 A8 A9 A11 G A10 E Q7 Q6 Q5 Q4 Q3
A7 A6 A5 A4 A3 A2 A1 A0 Q0
A 12 A 15 A 16 V PP V CC A 18 A 17 1 32 A14 A13 A8 A9 A11 G A10 E Q7 9 M27C4001 25 17 Q1 Q2 VSS Q3 Q4 Q5 Q6
AI00723
AI00722
Figure 2C. TSOP Pin Connections
A11 A9 A8 A13 A14 A17 A18 VCC VPP A16 A15 A12 A7 A6 A5 A4
1
32
8 9
M27C4001 (Normal)
25 24
16
17
AI01155B
G A10 E Q7 Q6 Q5 Q4 Q3 VSS Q2 Q1 Q0 A0 A1 A2 A3
DEVICE OPERATION The operating modes of the M27C4001 are listed in the Operating Modes table. A single power supply is required in the read mode. All inputs are TTL levels except for VPP and 12V on A9 for Electronic Signature. Read M ode The M27C4001 has t wo control functions, both of which m ust be logically active in order to obtain data at t he outputs. C hip Enable (E) is t he power control and s hould be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins, independent of device selection. Assuming that the addresses are stable, the address access time (tAVQV) i s equal to the delay from E to output (tELQV). Data is available at the output after a delay of t GLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV. Standby Mode The M27C4001 has a standby mode which reduces the supply c urrent from 30mA to 100µA. T he M27C4001 is placed in the s tandby mode by applying a CMOS high signal to the E input. When in the standby mode, the outputs are in a high impedance state, independent of the G input.
2/16
M27 C4 001
Table 2. Absolute Maximum Ratings (1)
Symbol TA TB IAS TSTG VIO (2) VCC VA9 (2) VP P Parameter Am bient Operat ing Temperature (3) Temperature Under Bias Sto rage Temperature Inp ut or Outp ut Voltage (except A9 ) Su pply Voltage A9 Voltage Pro gram Supply Voltage Value 40 to 125 50 to 125 65 to 150 2 to 7 2 to 7 2 to 13.5 2 to 14 Unit °C °C °C V V V V
Note: 1. Except for the rating " Operating T emperature R ange", stresses above those liste d in the Table "A bsolute Maximum R atings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above t hose indicated in t he Operating sections of t his s pecification is not impl ied. Exposure t o A bsolute M aximum R ating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 2. Minimum DC voltage on Input or O utput is 0.5V with possible undershoot to 2.0V for a period les s than 20ns. M aximum DC voltage on O utput is VCC +0.5V with possible overshoot to VCC + 2V for a period less than 20ns. 3. Depends on range.
Table 3. Operating Modes (1)
Mode R ead O utput Disable P rogram Verify P rogram In hibit S tandby E lectronic Si gnature E VIL VIL VIL Pu lse VIH VIH VIH VIL G VIL V IH V IH VIL V IH X VIL A9 X X X X X X VI D Vpp VCC or VSS VCC or VSS VPP VPP VPP VCC or VSS VCC Q0 - Q 7 Data Out Hi-Z Data In Data Out Hi-Z Hi-Z Codes
Note: 1. X = VIH or VIL, VID = 12V ± 0.5V.
Table 4. Electronic Signature
Ide ntifie r M anufacturer's Code E lectronic Si gnature A0 VIL VIH Q7 0 0 Q6 0 1 Q5 1 0 Q4 0 0 Q3 0 0 Q2 0 0 Q1 0 0 Q0 0 1 Hex Data 20h 41h
Two Line Output Control Because EPROMs are usually used in larger memory arrays, this product features a 2 line control f unction which accommodates the use of multiple memory connection. The two l ine control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus contention will not occur.
For the most ef ficient use of these two control lines, E should be decoded and used as the primary device selecting f unction, while G should be made a common connection to all devices in the array and connected to t he READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only act ive when data is required from a particular memory device.
3/16
Others parts begin by m2
|
|
|
