|
|
Part: M27C256B-10XB6X
Category:
Memory
-> EPROM
-> 8 Mb
Description: 256 Kbit ( 32kb X 8 ) uv EPROM And OTP EPROM
Company: ST Microelectronics, Inc.
Datasheet: Download M27C256B-10XB6X datasheet File size : 45 kB
Request For quote: Find where to buy M27C256B-10XB6X
Datasheet text preview:
M27C256B
256 Kbit (32Kb x 8) UV EPROM and OTP EPROM
5V ± 10% SUPPLY VOLTAGE in READ OPERATION FAST ACCESS TIME: 45ns LOW POWER CONSUMPTION: Active Current 30mA at 5MHz Standb y Current 100µA PROGRAMMING VOLTAGE: 12.75V ± 0.25V PROGRAMMING TIME: 100µs/byte (PRESTO II ALGORITHM) ELECTRONIC SIGNATURE Manufacturer Code: 20h Device Code: 8Dh
28
28
1
1
FDIP28W (F)
PDIP28 (B)
DESCRIPTION The M27C256B is a 256 Kbit EPROM offered in the two ranges UV (ultra violet erase) and OTP (one time programmable). It is ideally suited for microprocessor systems and is organized as 32,768 by 8 bits. The FDIP28W (window ceramic frit-seal package) has a transparent lid which allows the user to expose the chip t o ultraviolet light to erase the bit pattern. A new pattern can then be written to the device by following the programming procedure. For applications where the content is programmed only one time and erasure is not required, the M27C256B is offered in PDIP32, PLCC32 and TSOP28 (8 x 13.4 mm) package s.
PLCC32 (C)
TSOP28 (N) 8 x 13.4mn
Figure 1. Logic Diagram
VCC
VPP
15 A0-A14
8 Q0-Q7
Table 1 . Signal Names
A0-A14 Q0-Q7 E G VPP VCC VSS Address Inputs Data Outputs Chip Enable Output Enable Program Supply Supply Voltage Ground
E G
M27C256B
VSS
AI00755B
July 1998
1/15
M27C256B
Figure 2A. DIP Pin Connections Figure 2B. LCC Pin Connections
AI00756
Q1 Q2 VSS DU Q3 Q4 Q5
AI00757
VPP A12 A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2 VSS
1 28 2 27 3 26 4 25 5 24 6 23 7 22 M27C256B 8 21 9 20 10 19 11 18 12 17 13 16 14 15
VCC A14 A13 A8 A9 A11 G A10 E Q7 Q6 Q5 Q4 Q3
A6 A5 A4 A3 A2 A1 A0 NC Q0
A7 A 12 VPP DU VCC A 14 A 13 1 32 A8 A9 A11 NC G A10 E Q7 Q6 9 M27C256B 25 17
Warning: NC = N ot Connected, DU = Dont't Use.
Figure 2C. TSOP Pin Connections
G A11 A9 A8 A13 A14 VCC VPP A12 A7 A6 A5 A4 A3
22
21
28 1
M27C256B
15 14
7
8
AI00614B
A10 E Q7 Q6 Q5 Q4 Q3 VSS Q2 Q1 Q0 A0 A1 A2
DEVICE OPERATION The operating modes of the M27C256B are listed in the Operating Modes. A single power supply is required in the read mode. All inputs are TTL levels except for VPP and 12V on A9 for Electronic Signature. Read Mode The M27C256B has two control f unctions, both of which must be logically active in order to obtain data at the output s. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to t he output pins, independen t of device selection. Assuming that the addresses are stable, the address access time (tAVQV) is equal to the delay from E t o output (tELQV). Data is available at the output after delay of t GLQV from the f alling edge of G, assuming that E has been low and the addresses have been stable for at least t AVQV-tGLQV. Standby Mode The M27C256B has a standby mode which reduces the supply current from 30 mA to 100µA. The M27C256B is placed in the standby mode by applying a CMOS high signal to the E input. When in the standby mode, the outputs are in a high impedance state, independ ent of the G input.
2/15
M27C256B
Table 2. Absolute Maximum Ratings ( 1)
Symbol TA TBIAS TSTG VIO
( 2)
Parameter Am bient Operating Temperature Temperature Under Bias Storage Temperature Input or Output Voltages (except A9) Supply Voltage A9 Voltage Program Supply Voltage
(3)
Value 40 to 125 50 to 125 65 to 150 2 to 7 2 to 7 2 to 13.5 2 to 14
U nit °C °C °C V V V V
V CC VA9
(2)
VPP
N otes: 1. Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum R atings" may c ause permanent damage t o the device. These are stress ratings only and operation of the device at these or any other conditions above those indic ated i n the Operating sections of this s pecification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents. 2. Minimum DC v oltage on Input or Output is 0.5V with possible undershoot to 2.0V for a peri od less t han 20ns. Maximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less t han 20ns. 3. Depends on range.
Table 3 . Operating Modes
M ode Read Output Disable Program Verify Program Inhibit Standby Electronic Signature
Note: X = VIH or VIL, VI D = 12V ± 0.5V
E VIL VIL VIL Pulse VIH VIH VIH VIL
G VIL VI H VI H VIL VI H X VIL
A9 X X X X X X VID
VPP VCC VCC VPP VPP VPP VCC VCC
Q0 - Q7 Data Out H i-Z D ata In Data Out H i-Z H i-Z C odes
Table 4 . Electronic Signature
Identifier Manufacturer's Code Device Code A0 VI L VIH Q7 0 1 Q6 0 0 Q5 1 0 Q4 0 0 Q3 0 1 Q2 0 1 Q1 0 0 Q0 0 1 H ex D ata 20h 8Dh
Two Line Output Control Because EPROMs are usually used in larger memory arrays, this product f eatures a 2 line control function which accommodates t he use of multiple memory connection. The two line control function allows: a. t he lowest possible memory power dissipation, b. complete assurance that output bus content ion will not occur.
For the most efficient use of these two control lines, E should be decoded and used as t he primary device selecting function, while G should be made a common connection to all devices in the array and connected to the REA D line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is desired from a particular memory device.
3/15
Others parts begin by m2
|
|
|
