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Part: S5F518NZ03

Category:
 Sensors
   -> Image Sensors
     -> CCD

Description: 1/5 Inch CCD Image Sensor For NTSC Camera

Company: Samsung Semiconductor, Inc.

Datasheet: Download S5F518NZ03 datasheet     File size : 53 kB

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Datasheet text preview:
1/5 INCH CCD IMAGE SENSOR FOR NTSC CAMERA
S5F518NZ03
INTRODUCTION
The S5F518NZ03 is an interline transfer CCD area image sensor developed for NTSC 1/5 inch optical format PC cameras, object detector and image pattern recognizer. High sensitivity is achieved through the adoption of Ye, Cy, Mg and G complementary color mosaic filter, on-chip micro lenses. This chip features a field integration read out system and an electronic shutter with variable charge storage time.
14Pin Cer - DIP
FEATURES
· · · · · · · Optical Size 1/5 inch Format Ye, Cy, Mg, G On-chip Complementary Color Mosaic Filter Horizontal Register 3.3V ~ 5V Drive 14pin Ceramic DIP Package No Adjust Substrate Bias Field Integration Read Out System No DC Bias on Reset Gate
ORDERING INFORMATION
Device S5F518NZ03-LEB0 Package Operating
14Pin Cer - DIP -10 °C - +60 °C
STRUCTURE
· · · · · Number of Total Pixels: Number of Effective Pixels: Chip Size: Unit Pixel Size: Optical Blacks & Dummies: 381(H) × 506(V) 362(H) × 492(V) 3.75mm(H) × 3.30mm(V) 8.10 µm(H) × 4.45 µm(V) Refer to Figure Below Vertical 1 Line (Even Field Only)
14 2 362 17 2 Dummy Pixels Optical Black Pixels
Effective Imaging Area
OUTPUT
V-CCD
492 12
Effective Pixels
H-CCD
1
S5F518NZ03
1/5 INCH CCD IMAGE SENSOR FOR NTSC CAMERA
BLOCK DIAGRAM
(Top View)
7 V OUT
6 GND
5 NC
V1
4
V2
3
V3
2
V4
1
Vertical Shift Register CCD
Vertical Shift Register CCD
Vertical Shift Register CCD
Vertical Shift Register CCD
Cy Mg Cy Cy G Cy Mg
Ye G Ye Ye Mg Ye G
Cy Mg Cy Cy G Cy Mg
Ye G Ye Ye Mg Ye G
Horizontal Shift Register CCD
8 V DD
9 GND
SUB
10
11 VL
RG
12
H1
13
H2
14
Figure 1. Block Diagram
PIN DESCRIPTION
Table 1. Pin Description Pin 1 2 3 4 5 6 7 Symbol V4 V3 V2 V1 NC GND V OUT Description Vertical register transfer clock 4 Vertical register transfer clock 3 Vertical register transfer clock 2 Vertical register transfer clock 1 No connection Ground Signal output Pin 8 9 10 11 12 13 14 Symbol V DD GND SUB VL RG H1 H2 Description Output stage drain bias Ground Substrate clock Protection circuit bias Reset gate clock Horizontal CCD transfer clock 1 Horizontal CCD transfer clock 2
2
1/5 INCH CCD IMAGE SENSOR FOR NTSC CAMERA
S5F518NZ03
ABSOLUTE MAXIMUM RATINGS (NOTE)
Table 2. Absolute Maximum Ratings Characteristics Substrate voltage Vertical clock input voltage SUB - GND V1, V3, - GND V2, V4 - GND V 1 , V 3 , - VL V2, V4 - VL V1, V2, V3, V4 - SUB Horizontal clock input voltage V1, V2, - GND H1, H2 - V L Voltage difference between vertical and horizontal clock input pins V1, - V3 V2, - V4 H1, H2 H1, H2 - V4 Output clock input voltage Protection circuit bias voltage Operating temperature Storage temperature RG - GND VL - SUB T OP T STG Symbols Min. -0.3 -0.3 -0.3 -0.3 -0.3 -40 -0.3 -0.3 -30 -16 -16 -16 -0.3 -40 -10 -30 Max. 40 30 17 30 17 10 16 16 30 16 16 16 16 0.3 60 80 Unit V V V V V V V V V V V V V V °C °C
NOTE: The device can be destroyed, if the applied voltage or temperature is higher than the absolute maximum rating voltage or temperature.
3


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