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Part: S5F325NU
Category:
Sensors
-> Image Sensors
-> CCD
-> 250K Resolution->1/3 inch
Description: Description = S5F325NU 1/3 Inch CCD Image Sensor For Eia Camera ;; Resolution = - ;; Package = 16CERDIP ;; Production Status = Mass Production
Company: Samsung Semiconductor, Inc.
Datasheet: Download S5F325NU datasheet File size : 53 kB
Request For quote: Find where to buy S5F325NU
Datasheet text preview:
1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
S5F325NU02
INTRODUCTION
The S5F325NU02 is an interline transfer CCD area image sensor developed for EIA 1/3 inch optical format video cameras, surveillance cameras, object detectors and image pattern recognizers. High sensitivity is achieved through the on-chip micro lenses and HAD (Hole Accumulated Diode) photosensors. This chip features a field integration read out system and an electronic shutter with variable charge storage time.
16Pin Cer-DIP
FEATURES
· · · · · · · High Sensitivity Optical Size 1/3 inch Format Low Dark Current Horizontal Register 5V Drive 16pin Ceramic DIP Package Field Integration Read Out System No DC Bias on Reset Gate
ORDERING INFORMATION
Device S5F325NU02-LAB0 Package 16Pin Cer - DIP Operating -10 °C - +60 °C
STRUCTURE
· · · · · Number of Total Pixels: Number of Effective Pixels: Chip Size: Unit Pixel Size: Optical Blacks & Dummies: 537(H) × 505(V) 510(H) × 492(V) 6.00mm(H) × 4.95mm(V) 9.60 µm(H) × 7.50 µm(V) Refer to Figure Below Vertical 1 Line (Even Field Only)
16 2
510
25 1 Dummy Pixels Optical Black Pixels
Effective Imaging Area
OUTPUT
V-CCD
492 12
Eff ective Pixels
H-CCD
1
S5F325NU02
1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
BLOCK DIAGRAM
(Top View)
8 V OUT
7 VS S
6 VGG
5 GND
V1
4
V2
3
V3
2
V4
1
Vertical Shift Register CCD
Vertical Shift Register CCD
Vertical Shift Register CCD
Horizontal Shift Register CCD
Vertical Shift Register CCD
9 V DD
10 GND
11 SUB
12 VL
RS
13
14 NC
H1
15
H2
16
Figure 1. Block Diagram
PIN DESCRIPTION
Table 1. Pin Description Pin 1 2 3 4 5 6 7 8 Symbol V4 V3 V2 V1 GND VGG V SS V OUT Description Vertical CCD transfer clock 4 Vertical CCD transfer clock 3 Vertical CCD transfer clock 2 Vertical CCD transfer clock 1 Ground Output stage gate bias Output stage source bias Signal output Pin 9 10 11 12 13 14 15 16 Symbol V DD GND SUB VL RS NC H1 H2 Description Output stage drain bias Ground Substrate bias Protection circuit bias Charge reset clock No connection Horizontal CCD transfer clock 1 Horizontal CCD transfer clock 2
2
1/3 INCH CCD IMAGE SENSOR FOR EIA CAMERA
S5F325NU02
ABSOLUTE MAXIMUM RATINGS (1)
Table 2. Absolute Maximum Ratings Characteristics Substrate voltage Supply voltage SUB - GND VDD, VOUT, VSS - GND VDD, VOUT, VSS - SUB Vertical clock input voltage V1,V2, V3, V4 - GND V1, V2, V3, V4 - V L V1, V2, V3, V4 - SUB Horizontal clock input voltage H1, H2 - GND H1, H2 - SUB Voltage difference between vertical and horizontal clock input pins H1, H2 H1, H2 - V4 Output clock input voltage RS, VGG - GND RS, VGG - SUB Protection circuit bias voltage Operating temperature Storage temperature VL - SUB T OP T STG -17 -0.3 -55 -55 -10 -30 V1, V2, V3, V4 Symbols Min. -0.3 -0.3 -55 -10 -0.3 -55 -0.3 -55 Max. 55 18 10 20 30 10 10 17 15 27 (2) 17 17 15 10 10 60 80 Unit V V V V V V V V V V V V V V V °C °C
NOTES: 1. The device can be destroyed, if the applied voltage or temperature is higher than the absolute maximum rating voltage or temperature. 2. When the clock width is less than 10 µsec and the clock duty factor is less than 0.1%.
3
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