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Part: S3CS9PB
Category: Communication -> Security & Smart Card -> Smart Card Controller
Description: Description = S3CS9PB High Performance And Low Power Consumption Smart Card Microcontroller ;; EEPROM(KB) = 64 ;; Crypto-accelerator = Des/t-des,rsa ;; Standard = ISO7816 ;; Package = Wafer/cob ;; Production Status = Mass Production
Company: Samsung Semiconductor, Inc.
Datasheet: Download S3CS9PB datasheet File size : 122 kB
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Datasheet text preview:
S3CI9E0X01
FLASH INTERFACE DEVICE
S3CI9E0X01 SPECIFICATION
Version : Ver. 1.0 Date : Jul. 16. 2003
Samsung Electronics Co., LTD
Semiconductor Flash Memory Product Planning & Applications
SAMSUNG ELECTRONICS
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S3CI9E0X01
FLASH INTERFACE DEVICE
Revision History
Revision No. 0.0 Initial Draft History Draft Date Jan. 24 2002 0.1 1.On page 18, BSC is moved from bufferRAM Write Protection command register to system configuration register and bufferRAM Write Protection command register is removed. 2. Host Interface & NAND Flash Interface (page 3) : 1.8V 0.2 --> 1.8V / 2.5V / 3.0V Mar. 13 2002
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Remark
Preliminary
Jan. 25 2002
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Preliminary
1. Package information is added. 2. Some description is updated. 3. Controller ID register default value is modified. (Page 14) 4. Write Protection NAND Flash commands are changed, and description are updated.(Page 23, 56)
Preliminary
0.3
1. Package pin configuration is changed.(page9) 2. Software algorithm of detecting NAND Flash type is added. (page 18, 58) - CE2Ena : 11 bit of system configuration register is changed from `reserved' to `CE2Ena'.
Apr. 15 2002
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Preliminary
0.4
1. Minimum latency at sync. Read is changed from 2clocks to 3clocks 2. Technical notes are added - Write Protection truth table is updated(page 58) - Write Protection guidance is updated(page 58) - Internal register reset case is updated(page 61) - Pin connection guidance between Host and Eagle (page 61) - Asynchronous Page Read guidance (page 62) 3. DC/AC parameter is updated(page64~66) : 1 release parameter 4. tASC parameter is removed. tAES parameter is added
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Jun. 21 2002
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Preliminary
SAMSUNG ELECTRONICS
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S3CI9E0X01
FLASH INTERFACE DEVICE
4. Package dimension information is updated (page63~64) 5. Some descriptions are modified & added 0.5 1. Vcc is available on 1.8V and 2.5V part. 2. Pin J2 is changed from NC to DNU. 3. Fig30(State diagram of NAND Flash Write Protection) is updated.(page 57 ) 4. Internal Register reset case table is updated (page 63) 5. DC parameter is updated for 2.5V part (page 66~67) 6. Erratas and walk-around methods added (page 73~76) 7. Default value of Interrupt Status Register(1442h) is changed from 0000h to 8000h, which is not the silicon revision but definition change.(refer to Internal Regitster reset case table) (page 22) 9. Controller ID register value is updated from 1002h to 1202h (page 15) 10. AC parameters are updated (page 65~66) tCES, tIACC are added in Sync. Read. tVLWL is removed in Async. Write. tAVA is removed. tCS is added in Async. Write. 1.0 Spec. is finalized Jul. 16 2003
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Dec. 11 2002
Preliminary
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Others parts begin by s3
S3-1 S3-2 S3-3 S3-4
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