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Part: M372F0803BT0
Category:
Memory
-> DRAM
-> Async DRAM
-> Modules
-> Buffered DIMM
Description: Description = M372F0803BT0 8Mx72 DRAM Dimm With Ecc Using 8Mx8,4K&8K Refresh,3.3V ;; Density(MB) = 64 ;; Organization = 8Mx72 ;; Mode = Edo ;; Refresh = 4K/64ms ;; Speed(ns) = 50,60 ;; #of Pin = 168 ;; Component Composition = (8Mx8)x9+Drive ICx2 ;; Production Status = Eol ;; Comments = Buffered
Company: Samsung Semiconductor, Inc.
Datasheet: Download M372F0803BT0 datasheet File size : 1492 kB
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Datasheet text preview:
DRAM MODULE
M372F080(8)3BJ(T)0-C
Buffered 8Mx72 DIMM
(8Mx8 base)
Revision 0.1 June 1998
DRAM MODULE
Revision History
Version 0.0 (Sept. 1997)
M372F080(8)3BJ(T)0-C
· Removed two AC parameters tCACP(access time from CAS) and tAAP(access time from col. addr.) in AC CHARACTERISTICS.
Version 0.1 (June 1998)
· The 3rd. generation of 64M DRAM components are applied for this module. · Changed features of I/O interface from TTL to LVTTL in FEATURES. ; Typographic error
DRAM MODULE
M372F080(8)3BJ(T)0-C
M372F080(8)3BJ(T)0J(T)0-C EDO Mode 8M x 72 DRAM DIMM with ECC Using 8Mx8, 4K & 8K Refresh, 3.3V
GENERAL DESCRIPTION
The Samsung M372F080(8)3BJ(T)0-C is a 8Mx72bits Dynamic RAM high density memory module. The Samsung M372F080(8)3BJ(T)0-C consists of nine CMOS 8Mx8bits DRAMs in SOJ/TSOP-II 400mil packages and two 16 bits driver IC in TSSOP package mounted on a 168-pin glassepoxy substrate. A 0.1 or 0.22uF decoupling capacitor is mounted on the printed circuit board for each DRAM. The M372F080(8)3BJ(T)0-C is a Dual In-line Memory Module and is intended for mounting into 168 pin edge connector sockets.
FEATURES
· Part Identification Part number M372F0803BJ0-C M372F0803BT0-C M372F0883BJ0-C M372F0883BT0-C · · · · · · · · PKG SOJ TSOP SOJ TSOP Ref. 4K 8K CBR Ref. ROR Ref.
4K/64ms 4K/64ms 8K/64ms
PERFORMANCE RANGE
Speed -C50 -C60
tRAC
50ns 60ns
tCAC
18ns 20ns
t RC
84ns 104ns
tHPC
20ns 25ns
Extended Data Out Mode Operation CAS-before-RAS Refresh capability RAS-only and Hidden refresh capability LVTTL compatible inputs and outputs Single 3.3Vą0.3V power supply JEDEC standard pinout & Buffered PDpin Buffered input except RAS and DQ PCB : Height(1250mil), single sided component
PIN CONFIGURATIONS
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 Front VSS DQ0 DQ1 DQ2 DQ3 V CC DQ4 DQ5 DQ6 DQ7 DQ8 VSS DQ9 DQ10 DQ11 DQ12 DQ13 V CC DQ14 DQ15 DQ16 DQ17 VSS RSVD RSVD V CC W0 CAS0 Pin Front Pin Front Pin 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 DQ22 DQ23 VCC DQ24 RFU RFU RFU RFU DQ25 DQ26 DQ27 V SS DQ28 DQ29 DQ30 DQ31 VCC DQ32 DQ33 DQ34 DQ35 V SS PD1 PD3 PD5 PD7 ID0 VCC 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 Back V SS DQ36 DQ37 DQ38 DQ39 VCC DQ40 DQ41 DQ42 DQ43 DQ44 V SS DQ45 DQ46 DQ47 DQ48 DQ49 VCC DQ50 DQ51 DQ52 DQ53 V SS RSVD RSVD VCC RFU *C A S 1 Pin 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 Back *C A S 3 *R A S 1 RFU V SS A1 A3 A5 A7 A9 A11 *A13 VCC RFU B0 V SS RFU *R A S 3 *C A S 5 *C A S 7 PDE VCC RSVD RSVD DQ54 DQ55 V SS DQ56 DQ57 Pin 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 Back DQ58 DQ59 V CC DQ60 RFU RFU RFU RFU DQ61 DQ62 DQ63 V SS DQ64 DQ65 DQ66 DQ67 V CC DQ68 DQ69 DQ70 DQ71 V SS PD2 PD4 PD6 PD8 ID1 V CC 2 9 *C A S 2 3 0 RAS0 31 OE0 32 VSS 33 A0 34 A2 35 A4 36 A6 37 A8 38 A10 39 A12 40 V CC 41 RFU 42 RFU 43 VSS 44 OE2 4 5 RAS2 4 6 CAS4 4 7 *C A S 6 48 W2 49 V CC 50 RSVD 51 RSVD 5 2 DQ18 5 3 DQ19 54 VSS 5 5 DQ20 5 6 DQ21
PIN NAMES
Pin Names A0, B0, A1 - A11 A0, B0, A1 - A12 DQ0 - DQ71 W0 , W2 OE0 , OE2 RAS0, RAS2 CAS0, CAS4 V CC V SS NC PDE PD1 - 8 ID0 - 1 RSVD RFU Function Address Input(4K ref.) Address Input(8K ref.) Data In/Out Read/Write Enable Output Enable Row Address Strobe Column Address Strobe Power(+3.3V) Ground No Connection Presence Detect Enable Presence Detect ID bit Reserved Use Reserved for Future Use
Pins marked * are not used in this module.
PD & ID Table
Pin PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 ID0 50NS 1 0 1 1 1 0 0 0 0 60NS 1 0 1 1 1 1 1 0 0 0
NOTE : A12 is used for only M372F0883BJ/BT-C (8K Ref.)
ID1 0 PD Note :PD & ID Terminals must each be pulled up through a register to VCC at the next higher level assembly. PDs will be either open (NC) or driven to VSS via on-board buffer circuits. PD : 0 for Vol of Drive IC & 1 for N.C ID Note : IDs will be either open (NC) or connected directly to VSS without a buffer. ID : 0 for Vss & 1 for N.C
Others parts begin by m3
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