|
|
Part: SAA7110A
Category: Multimedia -> Video -> Decoders
Description: SAA7110; SAA7110A; One Chip Front-end 1 (OCF1);; Package: SOT188-2 (PLCC68)
Company: Philips Semiconductors
Datasheet: Download SAA7110A datasheet File size : 2565 kB
Request For quote: Find where to buy SAA7110A
Datasheet text preview:
INTEGRATED CIRCUITS
DATA SHEET
SAA7110; SAA7110A One Chip Front-end 1 (OCF1)
Product specification File under Integrated Circuits, IC22 1995 Oct 18
Philips Semiconductors
Product specification
One Chip Front-end 1 (OCF1)
CONTENTS 1 2 3 4 5 6 7 8 9 9.1 9.2 9.3 9.4 9.5 9.6 9.7 9.8 9.9 10 11 12 13 14 15 15.1 15.2 16 16.1 16.2 16.3 16.4 17 18 19 19.1 20 21 21.1 22 23 FEATURES APPLICATIONS GENERAL DESCRIPTION QUICK REFERENCE DATA ORDERING INFORMATION SYSTEM VIEW BLOCK DIAGRAM PINNING FUNCTIONAL DESCRIPTION Analog input processing (see Fig.5) Analog control circuits Chrominance processing (see Fig.6) Luminance processing (see Fig.7) YUV-bus (digital outputs) Synchronization (see Fig.7) Clock generation circuit Power-on reset RTCO output GAIN CHARTS LIMITING VALUES CHARACTERISTICS TIMING OUTPUT FORMATS CLOCK SYSTEM Clock generation circuit Power-on control I2C-BUS DESCRIPTION I2C-bus format I2C-bus receiver/transmitter tables I2C-bus detail I2C-bus detail (continued) SOURCE SELECTION MANAGEMENT ANTI-ALIAS FILTER GRAPHS CORING FUNCTION Coring function adjustment by subaddress 06H to affect band filter output adjustment LUMINANCE FILTER GRAPHS I2C-BUS START SET-UP Remarks to Table 66 APPLICATION INFORMATION START-UP, SOURCE SELECT AND STANDARD DETECTION FLOW EXAMPLE 23.1 23.2 23.3 23.4 23.5 23.6 23.7 23.8 23.9 23.10 24 25 25.1 25.2 25.3 25.4 26 27 28
SAA7110; SAA7110A
CODE 0 STARTUP and STANDARD Procedure MODE 0 Source Select Procedure MODE 1 Source Select Procedure MODE 2 Source Select Procedure MODE 3 Source Select Procedure MODE 4 Source Select Procedure MODE 5 Source Select Procedure MODE 6 Source Select Procedure MODE 7 Source Select Procedure MODE 8 Source Select Procedure PACKAGE OUTLINE SOLDERING Introduction Reflow soldering Wave soldering Repairing soldered joints DEFINITIONS LIFE SUPPORT APPLICATIONS PURCHASE OF PHILIPS I2C COMPONENTS
1995 Oct 18
2
Philips Semiconductors
Product specification
One Chip Front-end 1 (OCF1)
1 FEATURES
SAA7110; SAA7110A
· Requires only one crystal (26.8 MHz) for all standards · Real time status information output (RTCO) · Brightness Contrast Saturation (BCS) control for the YUV-bus · Negation of picture possible · One user programmable general purpose switch on an output pin · Switchable between on-chip Clock Generation Circuit (CGC) and external CGC (SAA7197) · Power-on control · I2C-bus controlled. 2 APPLICATIONS
· Six analog inputs (6 × CVBS or 3 × Y/C or combinations) · Three analog processing channels · Three built-in analog anti-aliasing filters · Analog signal adding of two channels · Two 8-bit video CMOS analog-to-digital converters · Fully programmable static gain for the main channels or automatic gain control for the selected CVBS/Y channel · Selectable white peak control signal · Luminance and chrominance signal processing for PAL B/G, NTSC M and SECAM · Full range HUE control · Automatic detection of 50/60 Hz field frequency, and automatic switching between standards PAL and NTSC, SECAM forceable · Horizontal and vertical sync detection for all standards · Cross-colour reduction by chrominance comb filtering for NTSC or special cross-colour cancellation for SECAM · UV signal delay lines for PAL to correct chrominance phase errors · The YUV-bus supports a data rate of: 780 × fh = 12.2727 MHz for 60 Hz (NTSC) 944 × fh = 14.75 MHz for 50 Hz (PAL/SECAM) · Square pixel format with 768/640 active samples per line on the YUV-bus · CCIR 601 level compatible · 4 : 2 : 2 and 4 : 1 : 1 YUV output formats in 8-bit resolution · User programmable luminance peaking for aperture correction · Compatible with memory-based features (line-locked clock, square pixel) 4 QUICK REFERENCE DATA SYMBOL VDDA VDDD Tamb PARAMETER analog supply voltage digital supply voltage operating ambient temperature
· Desktop video · Multimedia · Digital television · Image processing · Video phone · Video picture grabbing. 3 GENERAL DESCRIPTION
The one chip front-end SAA7110; SAA7110A is a digital multistandard colour decoder (OCF1) on the basis of the DIG-TV2 system with two integrated Analog-to-Digital Converters (ADCs), a Clock Generation Circuit (CGC) and Brightness Contrast Saturation (BCS) control. The CMOS circuit SAA7110; SAA7110A, analog front-end and digital video decoder, is a highly integrated circuit for desktop video applications. The decoder is based on the principle of line-locked clock decoding. It operates square-pixel frequencies to achieve correct aspect ratio. Monitor controls are provided to ensure best display. The circuit is I2C-bus controlled.
MIN. 4.75 4.5 0 5.5 70
MAX. 5.25 V V °C
UNIT
1995 Oct 18
3
Others parts begin by sa
SA-1 SA-2 SA-3 SA-4 SA-5 SA-6 SA-7 SA-8 SA-9 SA-10 SA-11 SA-12 SA-13 SA-14 SA-15 SA-16 SA-17 SA-18 SA-19 SA-20 SA-21 SA-22 SA-23 SA-24 SA-25 SA-26 SA-27 SA-28 SA-29 SA-30
|
|
|