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Part: PHP4N50E
Category: Discrete -> Transistors -> FETs (Field Effect Transistors) -> MOSFETs -> N-Channel
Description: Powermos Transistor: 500v, 5.3a
Company: Philips Semiconductors
Datasheet: Download PHP4N50E datasheet File size : 89 kB
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Philips Semiconductors
Objective specification
PowerMOS transistor
PHP4N50E
GENERAL DESCRIPTION
N-channel enhancement mode field-effect power transistor in a plastic envelope featuring high avalanche energy capability, stable blocking voltage, fast switching and high thermal cycling performance with low thermal resistance. Intended for use in Switched Mode Power Supplies (SMPS), motor control circuits and general purpose switching applications.
QUICK REFERENCE DATA
SYMBOL VDS ID Ptot RDS(ON) PARAMETER Drain-source voltage Drain current (DC) Total power dissipation Drain-source on-state resistance MAX. 500 5.3 100 1.5 UNIT V A W
PINNING - TO220AB
PIN 1 2 3 tab gate drain source drain DESCRIPTION
PIN CONFIGURATION
tab
SYMBOL
d
g
1 23
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDS VDGR ±VGS ID IDM IDR IDRM Ptot Tstg Tj Drain-source voltage Drain-gate voltage Gate-source voltage Drain current (DC) Drain current (pulse peak value) Source-drain diode current (DC) Source-drain diode current (pulse peak value) Total power dissipation Storage temperature Junction temperature CONDITIONS RGS = 20 k Tmb = 25 °C Tmb = 100 °C Tmb = 25 °C Tmb = 25 °C Tmb = 25 °C Tmb = 25 °C MIN. -55 MAX. 500 500 30 5.3 3.3 21 5.3 21 100 150 150 UNIT V V V A A A A A W °C °C
AVALANCHE LIMITING VALUE
SYMBOL PARAMETER WDSS CONDITIONS MIN. MAX. UNIT Drain-source non-repetitive ID = 5.3 A; VDD 50 V; VGS = 10 V; unclamped inductive turn-off RGS = 50 energy Tj = 25°C prior to surge Tj = 100°C prior to surge Drain-source repetitive ID = 5.3 A; VDD 50 V; VGS = 10 V; unclamped inductive turn-off RGS = 50 ; Tj 150 °C energy
WDSR1
-
280 44 7.4
mJ mJ mJ
Pulse width and frequency limited by Tj(max)
October 1996
1
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistor
PHP4N50E
THERMAL RESISTANCES
SYMBOL Rth j-mb Rth j-a PARAMETER Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS MIN. TYP. 60 MAX. 1.25 UNIT K/W K/W
STATIC CHARACTERISTICS
Tmb = 25 °C unless otherwise specified SYMBOL V(BR)DSS VGS(TO) IDSS IGSS RDS(ON) VSD PARAMETER Drain-source breakdown voltage Gate threshold voltage Drain-source leakage current Gate-source leakage current Drain-source on-state resistance Source-drain diode forward voltage CONDITIONS VGS = 0 V; ID = 0.25 mA VDS = VGS; ID = 0.25 mA VDS = 500 V; VGS = 0 V; Tj = 25 °C VDS = 400 V; VGS = 0 V; Tj = 125 °C VGS = ±30 V; VDS = 0 V VGS = 10 V; ID = 2.65 A IF = 5.3 A ;VGS = 0 V MIN. 500 2.0 TYP. 3.0 10 0.1 10 1.3 1.1 MAX. 4.0 100 1.0 100 1.5 1.4 UNIT V V µA mA nA V
DYNAMIC CHARACTERISTICS
Tmb = 25 °C unless otherwise specified SYMBOL gfs Ciss Coss Crss Qg(tot) Qgs Qgd td on tr td off tf trr Qrr Ld Ld Ls PARAMETER Forward transconductance Input capacitance Output capacitance Feedback capacitance Total gate charge Gate to source charge Gate to drain (Miller) charge Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Source-drain diode reverse recovery time Source-drain diode reverse recovery charge Internal drain inductance Internal drain inductance Internal source inductance CONDITIONS VDS = 15 V; ID = 2.65 A VGS = 0 V; VDS = 25 V; f = 1 MHz MIN. 1.5 TYP. 2.5 750 90 40 35 4 16 10 45 100 40 1200 6 3.5 4.5 7.5 MAX. 1000 140 70 45 60 140 65 UNIT S pF pF pF nC nC nC ns ns ns ns ns µC nH nH nH
VGS = 10 V; ID = 5.3 A; VDS = 400 V VDD = 30 V; ID = 2.6 A; VGS = 10 V; RGS = 50 ; RGEN = 50 IF = 5.3 A; -dIF/dt = 100 A/µs; VGS = 0 V; VR = 100 V Measured from contact screw on tab to centre of die Measured from drain lead 6 mm from package to centre of die Measured from source lead 6 mm from package to source bond pad
October 1996
2
Rev 1.000
Philips Semiconductors
Objective specification
PowerMOS transistor
PHP4N50E
MECHANICAL DATA
Dimensions in mm Net Mass: 2 g
4,5 max 10,3 max
1,3
3,7 2,8
5,9 min
15,8 max
3,0 max not tinned
3,0
13,5 min
1,3 max 1 2 3 (2x)
2,54 2,54
0,9 max (3x)
0,6 2,4
Fig.1. TO220AB; pin 2 connected to mounting base.
Notes 1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent damage to MOS gate oxide. 2. Refer to mounting instructions for TO220 envelopes. 3. Epoxy meets UL94 V0 at 1/8".
October 1996
3
Rev 1.000
Others parts begin by ph
PH-1 PH-2 PH-3 PH-4 PH-5
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