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Part: PCF8594C-2
Category:
Memory
-> ROM
-> EEPROM
Description: PCF8594C-2; 512 ' 8-bit CMOS EePROM With I2C-bus Interface
Company: Philips Semiconductors
Datasheet: Download PCF8594C-2 datasheet File size : 933 kB
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Datasheet text preview:
PCF8594C-2
512 × 8-bit CMOS EEPROM with I2C-bus interface
Rev. 03 -- 24 July 2003 Product data
1. Description
The PCF8594C-2 is a floating gate Electrically Erasable Programmable Read Only Memor y (EEPROM) with 4 kbits (512 × 8-bit) non-volatile storage. By using an internal redundant storage code, it is fault tolerant to single bit errors. This feature dramatically increases the reliability compared to conventional EEPROMs. Power consumption is low due to the full CMOS technology used. The programming voltage is generated on-chip, using a voltage multiplier. Data bytes are received and transmitted via the serial I2C-bus. Up to four PCF8594C-2 devices may be connected to the I2C-bus. Chip select is accomplished by two address inputs (A1 and A2). Timing of the E/W cycle is carried out internally, thus no external components are required. Programming Time Control (PTC), Pin 7, must be connected to either VDD or left open-circuit. There is an option of using an external clock for timing the length of an E/W cycle.
2. Features
s Low power CMOS: x 2.0 mA maximum operating current x maximum standby current 10 µA (at 6.0 V), typical 4 µA s Non-volatile storage of 4 kbits organized as 512 × 8-bit s Single supply with full operation down to 2.5 V s On-chip voltage multiplier s Serial input/output I2C-bus s Write operations: x byte write mode x 8-byte page write mode (minimizes total write time per byte) s Read operations: x sequential read x random read s Internal timer for writing (no external components) s Internal power-on reset s 0 to 100 kHz clock frequency s High reliability by using a redundant storage code s Endurance: 1,000,000 Erase/Write (E/W) cycles at Tamb = 22 °C s 10 years non-volatile data retention time
Philips Semiconductors
PCF8594C-2
512 × 8-bit CMOS EEPROM with I2C-bus interface
s ESD protection exceeds 2000 V HBM per JESD22-A114, 200 V MM per JESD22-A115, and 1000 V CDM per JESD22-C101 s Latch-up testing is done to JEDEC Standard JESD78 which exceeds 100 mA s Offered in DIP8 and SO8 packages.
3. Quick reference data
Table 1: Symbol VDD IDDR Quick reference data Parameter supply voltage supply current read fSCL = 100 kHz VDD = 2.5 V VDD = 6 V IDDW supply current E/W fSCL = 100 kHz VDD = 2.5 V VDD = 6 V IDD(stb) standby supply current VDD = 2.5 V VDD = 6 V 0.6 2.0 3.5 10 mA mA µA µA 60 200 µA µA Conditions Min 2.5 Typ Max 6.0 Unit V
4. Ordering information
Table 2: Ordering information Package Name PCF8594C-2P PCF8594C-2T DIP8 SO8 Description plastic dual in-line package; 8 leads (300 mil) Version SOT97-1 Type number
plastic small outline package 8 leads (straight); SOT96-1 body width 3.9 mm
9397 750 11758
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.
Product data
Rev. 03 -- 24 July 2003
2 of 21
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Product data Rev. 03 -- 24 July 2003
A2 A1 3 2 TEST MODE DECODER VDD 8 4
002aaa258
© Koninklijke Philips Electronics N.V. 2003. All rights reserved. 9397 750 11758
5. Block diagram
Philips Semiconductors
PCF8594C-2
SCL SDA 6 5 n INPUT FILTER I2C-BUS CONTROL LOGIC 1 WP
BYTE COUNTER 3 ADDRESS SWITCH SHIFT REGISTER BYTE LATCH (8 bytes) ADDRESS POINTER
ADDRESS HIGH REGISTER
SEQUENCER
DIVIDER ( 128)
8
EEPROM
4
EE CONTROL
512 × 8-bit CMOS EEPROM with I2C-bus interface
TIMER ( 16)
7
PTC
POWER-ON-RESET
OSCILLATOR
PCF8594C-2
VSS
3 of 21
Fig 1. Block diagram.
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