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Part: PI74ALVCH16600
Category:
Logic
-> Bus Interface
-> Bus Oriented Circuits
Description: 18-Bit Universal Bus Transceiver
Company: Pericom Semiconductor Corporation
Datasheet: Download PI74ALVCH16600 datasheet File size : 313 kB
Request For quote: Find where to buy PI74ALVCH16600
Datasheet text preview:
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16600
18-Bit Universal Bus Transceiver with 3-State Outputs
Product Features
· · · · · · · · PI74ALVCH16600 is designed for low voltage operation VCC = 2.3V to 3.6V Hysteresis on all inputs Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25°C Typical VOHV (Output VOH Undershoot) < 2.0V at VCC = 3.3V, TA = 25°C Bus Hold retains last active bus state during 3-State eliminating the need for external pullup resistors Industrial operation at 40°C to +85°C Packages available: 56-pin 240 mil wide plastic TSSOP (A) 56-pin 300 mil wide plastic SSOP (V)
Product Description
Pericom Semiconductors PI74ALVCH series of logic circuits are p r o d u c e d in the Companys advanced 0.5 micron CMOS technology, achieving industry leading speed. The PI74ALVCH16600 uses D-type latches and D-type flip-flops with 3-state outputs to allow data flow in transparent, latched, and clocked modes. Data flow in each direction is controlled by Output Enable (OEAB and OEBA), Latched Enable (LEAB and LEBA), and Clock (CLKAB and CLKBA) inputs. The clock can be controlled by the Clock Enable (CLKENAB and CLKENBA) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is HIGH. When LEAB is LOW, the A data is latched if CLKAB is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the high-to-low transition of CLKAB. Output enable OEAB is active low. When OEAB is low, the outputs are active. When OEAB is HIGH, the outputs are in the high-impedance state. Data flow for B to A is similar to that of A to B but uses OEBA, LEBA, CLKBA, and CLKENBA. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The PI74ALVCH16600 has Bus Hold which retains the data inputs last state whenever the data input goes to high-impedance preventing floating inputs and eliminating the need for pullup/ down resistors.
Logic Block Diagram
OEAB CLKENAB CLKAB LEAB LEBA CLKBA CLKENBA OEBA A1 1 56 55 2 28 30 29 27 3
CE 1D C1 CLK CE 1D C1 CLK
54
B1
To 17 Other Channels
1
PS8157A
11/06/00
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16600 18-Bit Universal Bus Transceiver
Product Pin Description
Pin Name CLKEN OE LE CLKAB Ax Bx GND VCC Description Clock Enable Input (Active LOW) Output Enable Input (Active LOW) Latch Enable (Active HIGH) Clock Input (Active LOW) Data I/O Data I/O Ground Power
Truth Table(1)
Inputs CLKENAB OEAB LEAB X X X H H L H L L L L L L L X H H L L L L L CLKAB X X X X X ¯ ¯ L or H A X L H X X L H H Outputs B Z L H BO BO L H BO
Product Pin Configuration
OEAB LEAB A1 GND A2 A3 VCC A4 A5 A6 GND A7 A8 A9 A10 A11 A12 GND A13 A14 A15 VCC A16 A17 GND A18 OEBA LEBA CLKENAB CLKAB B1 GND B2 B3 VCC B4 B5 B6 GND B7 B8 B9 B10 B11 B12 GND B13 B14 B15 VCC B16 B17 GND B18 CLKBA CLKENBA
L L
1 2 3 4 5 6 7 8
56 55 54 53 52
51 56-PIN 50 V-56 49 9 A-56 48 10 47 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
Notes: 1. H = High Signal Level L = Low Signal Level Z = High Impedance = HIGH-to-LOW Transition A-to-B data flow is shown: B-to-A flow is similar but uses OEBA, LEBA, CLKBA, and CLKENBA. Output level before the indicated steady-state input conditions were established.
2
PS8157A
11/06/00
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16600 18-Bit Universal Bus Transceiver
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ........ 65°C to +150°C Ambient Temperature with Power Applied ........ 40°C to +85°C Input Voltage Range, VIN ........ 0.5V to VCC +0.5V Output Voltage Range, VOUT ....... 0.5V to VCC +0.5V DC Input Voltage ....... 0.5V to +5.0V DC Output Current ... 100mA Power Dissipation ....... 1.0W
Note: S t r e s s e s greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Recommended Operating Conditions(1)
Parame te rs VCC VIH VIL VIN VOUT IOH De s cription Supply Voltage Input HIGH Voltage VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V 0 0 VCC = 2.3V High- level Output Current VCC = 2.7V VCC = 3.0V VCC = 2.3V IOL TA Low- level Output Current VCC = 2.7V VCC = 3.0V Operating Free- Air Temperature - 40 Te s t Conditions M in. 2.3 1.7 2.0 0.7 0.8 VCC VCC - 12 - 12 - 24 12 12 24 85 °C mA V Typ. M ax. 3.6 Units
Input LOW Voltage Input Voltage Output Voltage
Note: 1. Unused control inputs must be held HIGH or LOW to prevent them from floating.
3
PS8157A
11/06/00
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