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Part: PI74ALVCH16543

Category:
 Logic
   -> Bus Interface
             -> Bus Oriented Circuits

Description: 16-Bit Registered Transceiver

Company: Pericom Semiconductor Corporation

Datasheet: Download PI74ALVCH16543 datasheet     File size : 313 kB

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Datasheet text preview:
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16543
16-Bit Registered Transceiver with 3-State Outputs
Product Features
· · · · · · · · PI74ALVCH16543 is designed for low voltage operation VCC = 2.3V to 3.6V Hysteresis on all inputs Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25°C Typical VOHV (Output VOH Undershoot) < 2.0V at VCC = 3.3V, TA = 25°C Bus Hold retains last active bus state during 3-State, eliminating the need for external pullup resistors Industrial operation at 40°C to +85°C Packages available: 56-pin 240 mil wide plastic TSSOP (A) 56-pin 300 mil wide plastic SSOP (V)
Product Description
Pericom Semiconductors PI74ALVCH series of logic circuits are produced in the Companys advanced 0.5 micron CMOS technology, achieving industry leading speed. The PI74ALVCH16543, a 16-bit registered transceiver designed for 2.3V to 3.6V VCC operation, can be used as two 8-bit transceivers or one 16-bit transceiver. Separate Latch Enable (LEAB or LEBA), and Output Enable (OEAB and OEBA) inputs are provided for each register to permit independent control in either direction of data flow. The A-to-B Enable (CEAB) input must be LOW to enter data from A or to output data from B. If CEAB is LOW and LEAB is LOW, the A-to-B latches are transparent; a subsequent low-to-high transition of LEAB puts the A latches in the storage mode. With CEAB and OEAB both LOW, the 3-State B outputs are active and reflect the data present at the output of the A latches. Data flow from B to A is similar but requires using CEBA, LEBA, and OEBA. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pull-up resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
Logic Block Diagram
1
PS8128A 11/06/00
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16543 16-Bit Registered Transceiver with 3-State Outputs
Product Pin Description
Pin Name xOE xLE xCE GND VCC Description Output Enable Inputs (Active LOW) Latch Enable Inputs (Active LOW) A to B Enable Inputs (Active LOW) Ground Power
Product Pin Configuration
1OEAB 1LEAB 1CEAB
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
56-Pin A, V
56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29
1OEBA 1LEBA 1CEBA
GND
1 A1 1 A2
GND
1 B1 1 B2
Truth Table(1)
CEAB H X L L L LEAB X X H L L
Each 8-bit section
INPUTS OEAB X H L L L A X X X L H OUTPUT B Z Z B0(2) L H
VCC
1 A3 1 A4 1 A5
VCC
1 B3 1 B4 1 B5
GND
1 A6 1 A7 1 A8 2 A1 2 A2 2 A3 GND 2 A4 2 A5 2 A6
GND
1 B6 1 B7 1 B8 2 B1 2 B2 2 B3 GND 2 B4 2 B5 2 B6
Notes: 1. A-to-B data flow is shown: B-to-A control is the same except that it uses CEBA, LEBA, and OEBA. 2. Output level before the indicated steady-state input conditions were established. 3. H = High Voltage Level X = Dont Care L = Low Voltage Level
VCC
2 A7 2 A8
VCC
2 B7 2 B8
GND 2CEAB
2LEAB 2OEAB
GND 2CEBA
2LEBA 2OEBA
2
PS8128A 11/06/00
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16543 16-Bit Registered Transceiver with 3-State Outputs
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature .... 65°C to +150°C Ambient Temperature with Power Applied .. 40°C to +85°C Input Voltage Range, VIN ......... 0.5V to VCC +0.5V Output Voltage Range, VOUT .. 0.5V to VCC +0.5V DC Input Voltage ...... 0.5V to +5.0V DC Output Current ...... 100mA Power Dissipation ............ 1.0W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = 40°C to +85°C, VCC = 3.3V ±10%)
Parame te rs VCC VIH(3) VIL(3) VIN(3) VOUT(3) D e s cription Supply Voltage Input HIGH Voltage VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V 0 0 IOH = - 100µA, VCC = Min. to Max. O utput HIGH Voltage VIH = 1.7V, IOH = - 6mA, VCC = 2.3V VIH = 1.7V, IOH = - 12mA, VCC = 2.3V VIH = 2.0V, IOH = - 12mA, VCC = 2.7V VIH = 2.0V, IOH = - 12mA, VCC = 3.0V VIH = 2.0V, IOH = - 24mA, VCC = 3.0V IOL = 100µA, VIL = Min. to Max. VOL O utput LO W Voltage VIL = 0.7V, IOL = 6mA, VCC = 2.3V VIL = 0.7V, IOL = 12mA, VCC = 2.3V VIL = 0.8V, IOL = 12mA, VCC = 2.7V VIL = 0.8V, IOL = 24mA, VCC = 3.0V O utput HIGH Current VCC = 2.3V VCC = 2.7V VCC = 3.0V VCC = 2.3V VCC = 2.7V VCC = 3.0V
3
Te s t Conditions (1)
M in. 2.3 1.7 2.0
Typ.(2)
M ax. 3.6
Units
Input LO W Voltage Input Voltage O utput Voltage
0.7 0.8 VCC VCC
VCC - 0.2 2.0 1.7 2.2 2.4 2.0 0.2 0.4 0.7 0.4 0.55 - 12 - 12 - 24 12 12 24
PS8128A 11/06/00
V
VOH
IOH(3)
mA
IOL(3)
O utput LO W Current


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