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Part: PI74ALVCH16373
Category:
Logic
-> Latches
-> CMOS/BiCMOS->LVC/ALVC/VCX Family->Low Voltage
Description: 16-Bit Transparent D-type Latch
Company: Pericom Semiconductor Corporation
Datasheet: Download PI74ALVCH16373 datasheet File size : 313 kB
Request For quote: Find where to buy PI74ALVCH16373
Datasheet text preview:
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 1 2109876543212109876543210987654321098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16373
16-Bit Transparent D-Type Latch with 3-STATE Outputs
Product Features
· · · · · · · · PI74ALVCH16373 is designed for low voltage operation VCC = 2.3V to 3.6V Hysteresis on all inputs Typical VOLP (Output Ground Bounce) < 0.8V at VCC = 3.3V, TA = 25°C Typical VOHV (Output VOH Undershoot) < 2.0V at VCC = 3.3V, TA = 25°C Bus Hold retains last active bus state during 3-STATE, eliminating the need for external pullup resistors Industrial operation at 40°C to +85°C Packages available: 48-pin 240 mil wide plastic TSSOP (A) 48-pin 300 mil wide plastic SSOP (V)
Product Description
Pericom Semiconductor's PI74ALVCH series of logic circuits are p r o d u c e d in the Company's advanced 0.5 micron CMOS technology, achieving industry leading speed. This 16-bit transparent D-type latch is designed for 2.3V to 3.6V VCC operation. The PI74ALVCH16373 is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. This device can be used as two 8-bit latches or one 16-bit latch. When the Latch Enable (LE) input is HIGH, the Q outputs follow the (D) inputs. When LE is taken LOW, the Q outputs are latched at the levels set up at the D inputs. A buffered Output Enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state in which the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components. OE does not affect internal operations of the latch. Old data can be retained or new data can be entered while the outputs are in the high impedance state. To ensure the high impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
2
Logic Block Diagram
1OE
1
1LE
48
C1 1Q1 1D1
47
1D
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level.
To Seven Other Channels
24
2OE 2LE
25
C1
13
2Q1
2D1
36
1D
To Seven Other Channels
1
PS8093B 10/09/00
Product Pin Description
Pin Name OE LE Dx Qx GND VCC Description Output Enable Input (Active LOW) Latch Enable (Active HIGH) Data Inputs 3-State Outputs Ground Power
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321 21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16373 16-Bit Transparent D-Type Latch with 3-STATE Outputs
Truth Table(1)
Inputs OE L L L H LE H H L X D H L X X Outputs Q H L Q0 Z
Notes: 1. H = High Signal Level L = Low Signal Level X = Irrelevant Z = High Impedance
Product Pin Configuration
1OE 1Q1 1Q2 GND 1Q3 1Q4 VCC 1Q5 1Q6 GND 1Q7 1Q8 2Q1 2Q2 GND 2Q3 2Q4 VCC 2Q5 2Q6 GND 2Q7 2Q8 2OE
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
48 47 46 45 44 43 42 41
1LE 1D1 1D2 GND 1D3 1D4 VCC 1D5 1D6 GND 1D7 1D8 2D1 2D2 GND 2D3 2D4 VCC 2D5 2D6 GND 2D7 2D8 2LE
48-Pin V,A
40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25
2
PS8093B 10/09/00
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI74ALVCH16373 16-Bit Transparent D-Type Latch with 3-STATE Outputs
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.) Storage Temperature ... 65°C to +150°C Ambient Temperature with Power Applied .. 40°C to +85°C Input Voltage Range, VIN .... 0.5V to VCC +0.5V Output Voltage Range, VOUT ............ 0.5V to VCC +0.5V DC Input Voltage .......... 0.5V to +5.0V DC Output Current ...... 100 mA Power Dissipation .. 1.0W Note: Stresses greater than those listed under MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
DC Electrical Characteristics (Over the Operating Range, TA = 40°C to +85°C, VCC = 3.3V ±10%)
Parame te rs VCC VIH(3) De s cription Supply Voltage Input HIGH Voltage VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V Input LOW Voltage Input Voltage Output Voltage IOH = - 100µA, VCC = Min. to Max. VIH = 1.7V, IOH = - 6mA, VCC = 2.3V VOH Output HIGH Voltage VIH = 1.7V, IOH = - 12mA, VCC = 2.3V VIH = 2.0V, IOH = - 12mA, VCC = 2.7V VIH = 2.0V, IOH = - 12mA, VCC = 3.0V VIH = 2.0V, IOH = - 24mA, VCC = 3.0V IOL = 100µA, VIL = Min. to Max. Output LOW Voltage VIL = 0.7V, IOL = 6mA, VCC = 2.3V VIL = 0.7V, IOL = 12mA, VCC = 2.3V VIL = 0.8V, IOL = 12mA, VCC = 2.7V VIL = 0.8V, IOL = 24mA, VCC = 3.0V Output HIGH Current VCC = 2.3V VCC = 2.7V VCC = 3.0V Output LOW Current VCC = 2.3V VCC = 2.7V VCC = 3.0V VCC = 2.3V to 2.7V VCC = 2.7V to 3.6V 0 0 VCC - 0.2 2.0 V 1.7 2.2 2.4 2.0 0.2 0.4 0.7 0.4 0.55 - 12 - 12 - 24 mA 12 12 24 IOL(3) Te s t Conditions (1) M in. 2.3 1.7 2.0 0.7 0.8 VCC VCC Typ.(2) M ax. 3.6 Units
VIL(3) VIN(3) VOUT(3)
VOL
IOH(3)
3
PS8093B 10/09/00
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