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Part: EPA1140F-300
Category:
Description: SMD 8 Pin Dip 5 Tap Fast-ttl Logic Compatible Active Delay Lines
Company: PCA Electronics Inc.
Datasheet: Download EPA1140F-300 datasheet File size : 188 kB
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Datasheet text preview:
SMD 8 Pin DIP 5 Tap Fast-TTL Logic Compatible Active Delay Lines
TAP DELAYS ±5% or ±2 nS
5, 10, 15, 20 6, 12, 18, 24 7, 14, 21, 28 8, 16, 24, 32 9, 18, 27, 36 10, 20, 30, 40 12, 24, 36, 48 15, 30, 45, 60 20, 40, 60, 80 25, 50, 75, 100
TOTAL DELAYS ±5% or ±2 nS
25 30 35 40 45 50 60 75 100 125
PART NUMBER
EPA1140F-25 EPA1140F-30 EPA1140F-35 EPA1140F-40 EPA1140F-45 EPA1140F-50 EPA1140F-60 EPA1140F-75 EPA1140F-100 EPA1140F-125
TAP DELAYS ±5% or ±2 nS
30, 60, 90, 120 35, 70, 105, 140 40, 80, 120, 160 45, 90, 135, 180 50, 100, 150, 200 60, 120, 180, 240 70, 140, 210, 280 80, 160, 240, 320 90, 180, 270, 360 100, 200, 300, 400
TOTAL DELAYS ±5% or ±2 nS
150 175 200 225 250 300 350 400 450 500
PART NUMBER
EPA1140F-150 EPA1140F-175 EPA1140F-200 EPA1140F-225 EPA1140F-250 EPA1140F-300 EPA1140F-350 EPA1140F-400 EPA1140F-450 EPA1140F-500
Delay times referenced from input to leading edges at 25°C, 5.0V, with no load.
DC Electrical Characteristics Parameter Test Conditions
VOH VOL VIK IIH High-Level Output Voltage Low-Level Output Voltage Input Clamp Voltage High-Level Input Current
Min Max Unit
0.5 -1.2 50 1.0 -0.6 -150 V V V µA mA mA mA
Schematic
VCC = min. V IL = max. I OH = max 2.7 VCC = min. V IH = min. I OL = max VCC = min. I I = II K VCC = max. V IN = 2.7V VCC = max. V IN = 5.25V IIL Low-Level Input Current VCC = max. V IN = 0.5V IOS Short Circuit Output Current VCC = max. V OUT = 0. -40 (One output at a time) ICCH High-Level Supply Current VCC = max. V IN = OPEN ICCL Low-Level Supply Current VCC = max. V IN = 0 TRO Output Rise Time Td 500 nS (0.75 to 2.4 Volts) Td > 500 nS NH Fanout High-Level Output VCC = max. V OH = 2.7V NL Fanout Low-Level Output VCC = max. V OL = 0.5V
8
VCC
7
2
6
3
5 OUTPUT
INPUT 1
4 GROUND
mA 15 mA 50 nS 3 nS 3 20 TTL LOAD 10 TTL LOAD
Recommended Operating Conditions
VCC VIH VIL IIK IOH IOL PW* d* TA Supply Voltage High-Level Input Voltage Low-Level Input Voltage Input Clamp Current High-Level Output Current Low-Level Output Current Pulse Width of Total Delay Duty Cycle Operating Free-Air Temperature
Package Dimensions Min
4. 75 2. 0
Max
5.25 0.8 -18 -1.0 20
Unit
V V V mA mA mA % % °C
.400 Max. PCA EPA1140F-25 D.C. .100 .500 Max. .250 Max. .01 Typ. .280 Max.
.03
.055
Pad Layout
.410
40 -55 40 +125
.100
*These two values are inter-dependent.
Input Pulse Test Conditions @ 25° C
EIN PW TRI PRR VCC Pulse Input Voltage Pulse Width % of Total Delay Pulse Rise Time (0.75 - 2.4 Volts) Pulse Repetition Rate @ Td 200 nS Pulse Repetition Rate @ Td > 200 nS Supply Voltage 3.2 110 2.0 1.0 100 5.0
Unit
Volts % nS MHz KHz Volts
.02
.050
.300
ELECTRONICS
INC.
16799 SCHOENBORN ST. NORTH HILLS, CA 91343 TEL: (818) 892-0761 FAX: (818) 894-5791
EPA1140F 10/92
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