|
|
Part: PC87591S
Category:
Interface and Interconnect
-> Keyboard & Mouse Controllers
Description:
Company: National Semiconductor Corporation
Datasheet: Download PC87591S datasheet File size : 103 kB
Request For quote: Find where to buy PC87591S
Datasheet text preview:
PC87591E, PC87591S and PC87591L LPC Mobile Embedded Controllers
PRELIMINARY
March 2002 Revision 1.06
PC87591E, PC87591S and PC87591L LPC Mobile Embedded Controllers
General Description
The National Semiconductor PC87591E, PC87591S and PC87591L are highly integrated, embedded controllers with an embedded-RISC core and integrated advanced functions. These devices are targeted for a wide range of portable applications that use the Low Pin Count (LPC) interface. The PC87591S is targeted for security applications and includes supporting hardware such as the Hardware Random Number Generator. The PC8591L replaces the on-chip flash with 4K of boot ROM for value solutions using shared BIOS architecture. "PC87591x" refers to all the devices. The PC87591x incorporates National's CompactRISC CR16B core (a high-performance 16-bit RISC processor), on-chip flash (ROM for the PC87591L) and RAM memories, system support functions and a Bus Interface Unit (BIU) that directly interfaces with optional external memory (such as flash) and I/O devices. System support functions include: WATCHDOG and other timers, interrupt control, general-purpose I/O (GPIO) with internal keyboard matrix scanning, PS/2® Interface, ACCESS.bus® interface, high accuracy analog-to-digital (ADC) and digital-to-analog converters (DAC) for battery charging, system control, system health monitoring and analog controls.
®
The PC87591x interfaces with the host via an LPC interface that provides the host with access to the Keyboard and embedded controller interface channels, integrated functions, Real-Time Clock (RTC), BIOS firmware and security functions. Like members of National's SuperI/O family, the PC87591x is PC01 and ACPI compliant.
Outstanding Features
s s s s s s s s s s
Host interface, based on Intel's LPC Interface Specification Revision 1.0, September 29th, 1997 PC01 Rev 1.0, and ACPI 2.0 compliant 16-bit RISC core, with 2 Mbyte address space, and running at up to 20 MHz Software and Hardware controlled clock throttling Shared BIOS flash memor y (internal and/or external) Y2K-compliant RTC 84/117 GPIO por ts (for 128-pin/176-pin packages) with a variety of wake-up events Extremely low current consumption in Idle mode JTAG-based debugger interface 128-pin and 176-pin options, in LQFP and CSP packages (PC87591L is 176-pin only)
Block Diagram
LPC I/F Serial IRQ SMI Reset & Config CR16B Core
Processing Unit
DMA
Host Controlled Functions
LPC Bus I/F
Core Bus I/F Functions
CR Access Bridge
Shared mem. + Security
Memory
Bus Adapter RAM FLASH or ROM BIU
Internal Bus Peripheral Bus
KBC + PM Host I/F HFCG KBSCAN + ACM ACB (X2)
Peripherals
Timer + WDG MFT16 (X2)
MSWC
ICU
GPIO
ADC
USART
PMC
CLK
MIWU
Debugger I/F
PS/2 I/F
PWM
DAC
RTC JTAG
External Memory + I/O
32.768 KHz
National Semiconductor is a registered trademark of National Semiconductor Corporation. All other brand or product names are trademarks or registered trademarks of their respective holders.
© 2002 National Semiconductor Corporation
www.national.com
PC87591E/S/L
Features
(Continued)
Device-Specific Information
The following table compares features for the devices in the PC87591x family. The features listed below are a superset of the PC87591x family.
Function Flash Size ROM Size RAM Size General-Purpose Input/Output Por ts (GPIO) Shared BIOS RNG Memor y Protection
PC87591E 128-Pin 64K 2K 62 NO NO NO
PC87591E 176-Pin 64K 2K 93 YES NO NO
PC87591S 128-Pin 128K 4K 62 NO YES YES
PC87591S 176-Pin 128K 4K 93 YES YES YES
PC87591L 176-Pin 4K 2K 93 YES NO YES
Features
s
Processing Unit -- CompactRISC CR16B 16-bit embedded RISC processor core (the "core") -- 2 Mbyte address space Internal Memor y -- Up to 128 Kbytes of on-chip flash memor y (4 Kbytes of ROM in the PC87591L) -- Suppor ts BIOS (flash) memor y sharing with PC host -- On-chip flash is field upgradable by host, CR16B, parallel interface or JTAG -- Boot blocks for both CR16B and Host Code -- Memor y contents protection and security -- Hardware-protected boot zone with block protection circuit -- 2K (PC87591E/L) or 4K of on-chip RAM (PC87591S) -- All memory types can hold both code and data Expansion Memor y (Optional in 176-pin package) -- Up to 1 Mbyte of additional code and data -- Suppor ts BIOS (flash) memor y sharing with PC host -- Suppor ts external memory power-down mode -- Field upgradable with flash or SRAM devices -- Suppor ts host-controlled code download and update -- Bus Interface Unit (BIU) Three address zones for static devices (SRAM, ROM, flash, I/O)
s
s
LPC System Interface -- Synchronous cycles, up to 33 MHz bus clock -- Serial IRQ -- I/O and Memory read and write cycles -- Bootable memory support -- Bus Master read and write cycles -- Reset input -- Base Address (BADDR) strap to determine the base address of the Index-Data register pair -- LPCPD and CLKRUN support -- FWH Transaction support Security Function Suppor t -- Random Number Generator (RNG) -- Full Random using temperature, voltage and system noise. -- Memor y access protection
s
s
Embedded Controller System Features
s
Host Bus Interface (HBI) -- Three host interface channels, typically used for the KBC, ACPI Private or Shared EC channels -- 8042 KBC standard Interface (legacy 6016, 6416) -- -- -- -- Intel 80C51SL compatible IRQ1 and IRQ12 support Fast Gate A20 and Fast Host Reset via firmware PM interface port (legacy 6216, 6616)
Configurable wait states and fast-read, singlecycle bus cycles 8- or 16-bit wide bus
-- ACPI Embedded Controller with either Shared or Private interface -- IRQ, SMI or SCI generation
www.national.com
2
Revision 1.06
PC87591E/S/L
Features
s
(Continued)
s
Interrupt Control Unit (ICU) -- 31 maskable vectored interrupts (of which 26 are external) -- General-purpose external interrupt inputs through MIWU -- Enable and pending indication for each interrupt -- Non-maskable interrupt input Multi-Input Wake-Up (MIWU) -- Suppor ts up to 32 wake-up or interrupt inputs -- Generates wake-up event to PMC (Power Management Controller) -- Generates interrupts to ICU -- Provides user-selectable trigger conditions General-Purpose I/O (GPIO) -- 84/117 por t pins in 128-pin/176-pin package, respectively. -- I/O pins individually configured as input or output -- Configurable internal pull-up resistors -- Special ports for internal keyboard matrix scanning 16 open-collector outputs
Pulse Width Modulation (PWM) Module -- Eight outputs -- 8-bit duty cycle resolution -- Common input clock prescaler Timer and WATCHDOG (TWM) -- 16-bit periodic interrupt timer with 30 µs resolution and 5-bit prescaler for system tick and periodic wake-up tasks -- 8-bit WATCHDOG timer Analog to Digital Conver ter (ADC) -- Four teen channels, with 10-bit resolution -- Sigma-delta technology for high noise rejection -- Three voltage measurements and one temperature measurement every 100 ms -- Internal voltage reference Hardware Monitoring -- Controlled by embedded controller -- System Voltage Measurement Up to eight external measurement points
s
s
s
s
s
Eight Schmitt inputs with internal pull-ups
Four internal measurement points Smar t power failure detection
-- Input for system On/Off switch -- 27 external wake-up events -- Low-cost external GPIO expansion through the BIU I/O Expansion protocol
s
-- Diode-Based Temperature Measurement Software-controlled fault detection
Hardware-monitored over-temperature detection
PS/2 Interface -- Suppor ts four external por ts: Keyboard, mouse and two additional pointing devices -- Suppor ts byte-level handling via hardware accelerator Two ACCESS.bus (ACB) Interface modules. Each is: -- -- -- -- -- Intel SMBus® and Philips I2C® compatible ACCESS.bus master and slave Up to three simultaneous slave addresses detected Suppor ts polling and interrupt controlled operation Generates a wake-up signal on detection of a Star t Condition while in Idle mode -- Optional internal pull-up on SDA and SCL pins
-- Production time calibration using flash parameters
s
Digital to Analog Conver ter (DAC) -- Four channels, 8-bit resolution -- 1 µs conversion time for 50 pF load -- Full output range from AGND to AVCC Analog Comparators Monitor (ACM) -- Eight comparator inputs on KBD scan inputs -- 6-bit input measurement resolution -- Scan and Threshold modes -- Suppor ts low-current system wake-up Development Suppor t Features -- Interface to debugger via JTAG pins ISE/ADB mode
s
s
s
s
Two 16-bit Multi Function Timer (MFT16) modules. Each module: -- Contains two 16-bit timers -- Suppor ts Pulse Width Modulation (PWM), Capture and Counter Universal Synchronous/ Asynchronous Receiver-transmitter (USART) -- A full-duplex USART channel -- Programmable baud rate -- Data transfer via interrupt or polling -- Synchronous mode with either internal or external clock -- 7-, 8- or 9-bit protocols.
On-board Debug mode
-- Flash programing via JTAG
s
CR16B Access to Host Controlled Functions -- Enabled when host inactive
s
Host Controlled Functions Features
s
Suppor ts Microsoft® Advanced Power Management (APM) Specifications Revision 1.2, February 1996 -- Generates the System Management Interrupt (SMI) PC1 and ACPI Compliant -- PnP Configuration Register structure -- Flexible resource allocation for all logical devices Relocatable base address
s
Revision 1.06
3
www.national.com
Others parts begin by pc
PC-1 PC-2 PC-3 PC-4 PC-5 PC-6 PC-7 PC-8 PC-9 PC-10 PC-11 PC-12 PC-13 PC-14 PC-15 PC-16 PC-17 PC-18 PC-19 PC-20 PC-21
|
|
|
