|
|
Part: EM128L08
Category:
Memory
-> SRAM
-> Low Power
-> Ultra-low Power SRAMs
Description: 1Mb, , 128Kb X 8, 2.3 - 3.6, 55, Dual CE, 32-TSOP1, 32-STSOP1, 32-SOP,
Company: NanoAmp Solutions, Inc.
Datasheet: Download EM128L08 datasheet File size : 48 kB
Request For quote: Find where to buy EM128L08
Datasheet text preview:
NanoAmp Solutions, Inc. 1982 Zanker Road, San Jose, CA 95112 ph: 408-573-8878, FAX: 408-573-8877 www.nanoamp.com
N01L083WC2A
1Mb Ultra-Low Power Asynchronous CMOS SRAM
128Kx8 bit Overview
The N01L083WC2A is an integrated memory device containing a 1 Mbit Static Random Access Memory organized as 131,072 words by 8 bits. The device is designed and fabricated using NanoAmp's advanced CMOS technology to provide both high-speed performance and ultra-low power. The base design is the same as NanoAmp's N01L1618N1A, which is processed to operate at lower voltages. The device operates with two chip enable (CE1 and CE2) controls and output enable (OE) to allow for easy memory expansion. The N01L083WC2A is optimal for various applications where low-power is critical such as battery backup and hand-held devices. The device can operate over a very wide temperature range of -40oC to +85oC and is available in JEDEC standard packages compatible with other standard 128Kb x 8 SRAMs
Features
· Single Wide Power Supply Range 2.3 to 3.6 Volts · Very low standby current 2.0µA at 3.0V (Typical) · Very low operating current 2.0mA at 3.0V and 1µs (Typical) · Very low Page Mode operating current 0.8mA at 3.0V and 1µs (Typical) · Simple memory control Dual Chip Enables (CE1and CE2) Output Enable (OE) for memory expansion · Low voltage data retention Vcc = 1.8V · Very fast output enable access time 30ns OE access time · Automatic power down to standby mode · TTL compatible three-state output driver
Product Family
Part Number Package Type Operating Temperature Power Supply (Vcc) Speed Standby Operating Current (ISB), Current (Icc), Typical Typical
N01L083WC2AT 32 - TSOP I N01L083WC2AN 32 - STSOP I N01L083WC2AS 32 SOP -40oC to +85oC 2.3V - 3.6V 55ns @ 2.7V 70ns @ 2.3V 2 µA 2 mA @ 1MHz
Pin Configuration
A11 A9 A8 A13 WE CE 2 A15 VCC NC A16 A14 A12 A7 A6 A5 A4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 OE A10 CE 1 I/O7 I/O6 I/O5 I/O4 I/O3 VSS I/O2 I/O1 I/O0 A0 A1 A2 A3 NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O0 I/O1 I/O2 VS S 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 VC C A15 CE2 WE A13 A8 A9 A11 OE A10 CE1 I/O7 I/O6 I/O5 I/O4 I/O3
Pin Descriptions
Pin Name A0-A16 WE CE1, CE2 OE I/O0-I/O7 VC C VSS NC Pin Function Address Inputs Write Enable Input Chip Enable Input Output Enable Input Data Inputs/Outputs Power Groun d Not Connected
32-Pin STSOP-I TSOP-I
32-Pin SOP
Stock No. 23033-05 12/02 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
1
NanoAmp Solutions, Inc. Functional Block Diagram Word Address Decode Logic Word Mux
N01L083WC2A
Address Inputs A0 - A3
Address Inputs A4 - A16
Page Address Decode Logic
8K Page x 16 word x 8 bit RAM Array
Input/ Output Mux and Buffers
I/O0 - I/O7
CE1 CE2 WE OE
Control Logic
Functional Description
CE1 H X L L L CE2 X L H H H WE X X L H H OE X X X2 L H I/O0 - I/O7 High Z High Z Data In Data Out High Z MODE Standby1 Standby1 Write2 Read Active POWER Standby Standby Active Active Active
1. When the device is in standby mode, control inputs (WE and OE), address inputs and data input/outputs are internally isolated from any external influence and disabled from exerting any influence externally. 2. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
Capacitance1
Item Input Capacitance I/O Capacitance Symbol CIN CI/O Test Condition VIN = 0V, f = 1 MHz, TA = 25oC VIN = 0V, f = 1 MHz, TA = 25oC Min Max 8 8 Unit pF pF
1. These parameters are verified in device characterization and are not 100% tested
Stock No. 23033-05 12/02 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
2
NanoAmp Solutions, Inc.
N01L083WC2A
Symbol VIN,OUT VCC PD TSTG TA TSOLDER Rating 0.3 to VCC+0.3 0.3 to 4.5 500 40 to 125 -40 to +85 240oC, 10sec(Lead only) Unit V V mW
o o o
Absolute Maximum Ratings1
Item Voltage on any pin relative to VSS Voltage on VCC Supply Relative to VSS Power Dissipation Storage Temperature Operating Temperature Soldering Temperature and Time
C C C
1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Operating Characteristics (Over Specified Temperature Range)
Item Supply Voltage Data Retention Voltage Input High Voltage Input Low Voltage Output High Voltage Output Low Voltage Input Leakage Current Output Leakage Current Read/Write Operating Supply Current @ 1 µS Cycle Time2 Read/Write Operating Supply Current @ 70 nS Cycle Time2 Page Mode Operating Supply Current @ 70ns Cycle Time2 (Refer to Power Savings with Page Mode Operation diagram) Read/Write Quiescent Operating Supply Current3 Symbol VCC VDR VIH VIL VOH VOL ILI ILO ICC1 ICC2 IOH = 0.2mA IOL = -0.2mA VIN = 0 to VCC OE = VIH or Chip Disabled VCC=3.6 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 VCC=3.6 V, VIN=VIH or VIL Chip Enabled, IOUT = 0 VCC=3.6 V, VIN=VIH or VIL Chip Enabled, IOUT = 0, VCC=3.6 V, VIN=VIH or VIL Chip Enabled, IOUT = 0, f=0 VIN = VCC or 0V Chip Disabled tA= 85oC, VCC = 3.6 V Vcc = 1.8V, VIN = VCC or 0 Chip Disabled, tA= 85oC 2.0 2.0 9.5 Chip Disabled3 Test Conditions Min. 2.3 1.8 1.8 0.3 VCC0.2 0.2 0.5 0.5 3.0 14.0 VCC+0.3 0.6 Typ1 3.0 Max 3.6 Unit V V V V V V µA µA mA mA
ICC3
4
mA
ICC4
3.0
mA
Maximum Standby
Current3
I SB1
20
µA
Maximum Data Retention Current3
IDR
10
µA
1. Typical values are measured at Vcc=Vcc Typ., TA=25°C and not 100% tested. 2. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current required to drive output capacitance expected in the actual system. 3. This device assumes a standby mode if the chip is disabled (CE1 high or CE2 low). In order to achieve low standby current all inputs must be within 0.2 volts of either VCC or VSS.
Stock No. 23033-05 12/02 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
3
NanoAmp Solutions, Inc. Power Savings with Page Mode Operation (WE = VIH)
N01L083WC2A
Page Address (A4 - A16)
Open page ...
Word Address (A0 - A3)
Word 1
Word 2
Word 16
CE1 CE2
OE
Note: Page mode operation is a method of addressing the SRAM to save operating current. The internal organization of the SRAM is optimized to allow this unique operating mode to be used as a valuable power saving feature. The only thing that needs to be done is to address the SRAM in a manner that the internal page is left open and 8-bit words of data are read from the open page. By treating addresses A0-A3 as the least significant bits and addressing the 16 words within the open page, power is reduced to the page mode value which is considerably lower than standard operating currents for low power SRAMs.
Stock No. 23033-05 12/02 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
4
NanoAmp Solutions, Inc. Timing Test Conditions
Item Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Levels Output Load Operating Temperature
N01L083WC2A
0.1VCC to 0.9 VCC 5ns 0.5 VCC CL = 30pF -40 to +85 oC
Timing
Item Read Cycle Time Address Access Time Chip Enable to Valid Output Output Enable to Valid Output Chip Enable to Low-Z output Output Enable to Low-Z Output Chip Disable to High-Z Output Output Disable to High-Z Output Output Hold from Address Change Write Cycle Time Chip Enable to End of Write Address Valid to End of Write Write Pulse Width Address Setup Time Write Recovery Time Write to High-Z Output Data to Write Time Overlap Data Hold from Write Time End Write to Low-Z Output Symbol tRC tAA tCO tOE tLZ tOLZ tHZ tOHZ tOH tWC tCW tAW tWP tAS tWR tWHZ tDW tDH tOW 40 0 5 10 5 0 0 10 70 50 50 40 0 0 20 35 0 5 20 20 2.3 - 3.6 V Min. 70 70 70 35 10 5 0 0 10 55 45 45 35 0 0 15 15 15 Max. 2.7 - 3.6 V Min. 55 55 55 30 Max. Units ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns
Stock No. 23033-05 12/02 The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
5
Others parts begin by em
EM-1 EM-2 EM-3 EM-4 EM-5 EM-6 EM-7
|
|
|
