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Part: MAX5888AEGK
Category:
Data Conversion
-> High-Speed Data Converters
Description: MAX5888, MAX5888A 3.3V, 16-Bit, 500Msps High Dynamic Performance DAC With Differential LVDS Inputs
Company: Maxim Integrated Products
Datasheet: Download MAX5888AEGK datasheet File size : 524 kB
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Datasheet text preview:
19-2726; Rev 2; 3/03
3.3V, 16-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputs
General Description
The MAX5888 is an advanced, 16-bit, 500Msps digitalt o - a n a l o g converter (DAC) designed to meet the demanding performance requirements of signal synthesis applications found in wireless base stations and other communications applications. Operating from a single 3.3V supply, this DAC offers exceptional dynamic performance such as 76dBc spurious-free dynamic range (SFDR) at fOUT = 40MHz. The DAC supports update rates of 500Msps and a power dissipation of only 250mW. The MAX5888 utilizes a current-steering architecture, which supports a full-scale output current range of 2mA to 20mA, and allows a differential output voltage swing between 0.1VP-P and 1VP-P. The MAX5888 features an integrated 1.2V bandgap reference and control amplifier to ensure high accuracy and low noise performance. Additionally, a separate reference input pin enables the user to apply an extern a l reference source for optimum flexibility and to improve gain accuracy. The digital and clock inputs of the MAX5888 are designed for differential low-voltage differential signal ( L V D S ) - c o m p a t i b l e voltage levels. The MAX5888 is available in a 68-lead QFN package with an exposed paddle (EP) and is specified for the extended industrial temperature range (-40°C to +85°C). Refer to the MAX5887 and MAX5886 data sheets for pin-compatible 14- and 12-bit versions of the MAX5888.
B4N B5N B6N B4P B5P B6P
Features
o 500Msps Output Update Rate o Single 3.3V Supply Operation o Excellent SFDR and IMD Performance SFDR = 76dBc at fOUT = 40MHz (to Nyquist) IMD = -85dBc at fOUT = 10MHz ACLR = 73dB at fOUT = 61MHz o 2mA to 20mA Full-Scale Output Current o Differential, LVDS-Compatible Digital and Clock Inputs o On-Chip 1.2V Bandgap Reference o Low 130mW Power Dissipation o 68-Lead QFN-EP Package
MAX5888
Ordering Information
PART MAX5888AEGK MAX5888EGK TEMP RANGE -40°C to +85°C -40°C to +85°C PINPACKAGE 68 QFN-EP* 68 QFN-EP*
*EP = Exposed paddle.
Pin Configuration
DGND DGND DVDD B10N B7P B8P B9P
TOP VIEW
Applications
Base Stations: Single-/Multicarrier UMTS, CDMA, GSM Communications: LMDS, MMDS, Point-to-Point Microwave Digital Signal Synthesis Automated Test Equipment (ATE) Instrumentation
B3P B3N B2P B2N B1P B1N B0P B0N DGND
1 2 3 4 5 6 7 8 9
68
67 66 65 64
63 62 61 60 59 58
57 56 55 54 53 52
B10P
51 B11N 50 B11P 49 B12N 48 B12P 47 B13N 46 B13P 45 B14N 44 B14P 43 B15N 42 B15P 41 DGND 40 DVDD 39 SEL0 38 N.C. 37 N.C. 36 N.C. 35 N.C.
B7N
B8N
MAX5888
DVDD 10 VCLK 11 CLKGND 12 CLKP 13 CLKN 14 CLKGND 15 VCLK 16 PD 17
18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34
AGND
REFIO
DACREF
IOUTN
FSADJ
IOUTP
N.C.
AGND
AGND
AGND
B9N
AGND
AVDD
AVDD
AVDD
AVDD
QFN
________________________________________________________________ Maxim Integrated Products
AVDD
N.C.
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
3.3V, 16-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputs MAX5888
ABSOLUTE MAXIMUM RATINGS
AVDD, DVDD, VCLK to AGND........-0.3V to +3.9V AVDD, DVDD, VCLK to DGND .......-0.3V to +3.9V AVDD, DVDD, VCLK to CLKGND ...-0.3V to +3.9V AGND, CLKGND to DGND...-0.3V to +0.3V DACREF, REFIO, FSADJ to AGND....-0.3V to AVDD + 0.3V IOUTP, IOUTN to AGND........-1V to AVDD + 0.3V CLKP, CLKN to CLKGND...-0.3V to VCLK + 0.3V B0P/B0NB15P/B15N, SEL0, PD to DGND ..........-0.3V to DVDD + 0.3V Continuous Power Dissipation (TA = +70°C) 68-Lead QFN-EP (derate 41.7mW/°C above +70°C) ...3333mW Thermal Resistance (JA) ....+24°C/W Operating Temperature Range ..-40°C to +85°C Junction Temperature .....+150°C Storage Temperature Range ....-60°C to +150°C Lead Temperature (soldering, 10s) ........+300°C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(AVDD = DVDD = VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference, VREFIO = 1.25V, RL = 50, IOUT = 20mA, TA = TMIN to TMAX, unless otherwise noted. +25°C guaranteed by production test, <+25°C guaranteed by design and characterization. Typical values are at TA = +25°C.)
PARAMETER STATIC PERFORMANCE Resolution MAX5888A___, measured differentially, TA +25°C MAX5888___, measured differentially, TA +25°C Differential Nonlinearity Offset Error Offset Drift Full-Scale Gain Error Gain Drift Full-Scale Output Current Min Output Voltage Max Output Voltage Output Resistance Output Capacitance DYNAMIC PERFORMANCE Output Update Rate Noise Spectral Density Spurious-Free Dynamic Range to Nyquist fCLK fCLK = 300MHz fCLK = 500MHz SFDR fCLK = 100MHz fOUT = 16MHz, -12dB FS fOUT = 16MHz, -12dB FS fOUT = 1MHz, 0dB FS fOUT = 1MHz, -6dB FS fOUT = 1MHz, -12dB FS 1 -165 -164 88 89 85 dBc 500 Msps dB FS/ Hz ROUT C OUT IOUT GEFS External reference, TA +25°C Internal reference External reference (Note 1) Single ended Single ended 2 -0.5 1.1 1 5 -3.1 ±100 ±50 20 MAX5888A___, measured differentially, TA +25°C MAX5888___, measured differentially, TA +25°C OS -0.025 -0.006 -0.008 16 ±0.004 ±0.006 ±0.002 ±0.003 ±0.003 ±50 +1.1 +0.025 %FS ppm/°C %FS ppm/°C mA V V M pF +0.006 % FS +0.008 % FS Bits SYMBOL CONDITIONS MIN TYP MAX UNITS
Integral Nonlinearity
INL
DNL
2
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3.3V, 16-Bit, 500Msps High Dynamic Performance DAC with Differential LVDS Inputs
ELECTRICAL CHARACTERISTICS (continued)
(AVDD = DVDD = VCLK = 3.3V, AGND = DGND = CLKGND = 0, external reference, VREFIO = 1.25V, RL = 50, IOUT = 20mA, TA = TMIN to TMAX, unless otherwise noted. +25°C guaranteed by production test, <+25°C guaranteed by design and characterization. Typical values are at TA = +25°C.)
PARAMETER SYMBOL CONDITIONS fCLK = 100MHz fOUT = 10MHz, -12dB FS fOUT = 30MHz, -12dB FS fOUT = 10MHz, -12dB FS fOUT = 16MHz, -12dB FS, fCLK = 200MHz TA +25°C SFDR fOUT = 50MHz, -12dB FS fOUT = 80MHz, -12dB FS fOUT = 10MHz, -12dB FS fCLK = 500MHz fOUT = 30MHz, -12dB FS fOUT = 50MHz, -12dB FS fOUT = 80MHz, -12dB FS Spurious-Free Dynamic Range, 25MHz Bandwidth SFDR fCLK = 150MHz fOUT = 20MHz, -12dB FS fCLK = 100MHz 2-Tone IMD TTIMD fCLK = 300MHz 4-Tone IMD, 1MHz Frequency Spacing, GSM Model Adjacent Channel Leakage Power Ratio, 4.1MHz Bandwidth, WCDMA Model Output Bandwidth REFERENCE Internal Reference Voltage Range Reference Voltage Drift Reference Input Compliance Range Reference Input Resistance ANALOG OUTPUT TIMING Output Fall Time Output Rise Time Output Voltage Settling Time Output Propagation Delay Glitch Energy Output Noise N OUT IOUT = 2mA IOUT = 20mA tF A L L tRISE tS E T T L E tPD 90% to 10% (Note 3) 10% to 90% (Note 3) Output settles to 0.025% FS (Note 3) (Note 3) 375 375 11 1.8 1 30 30 ps ps ns ns pV-s pA/Hz V REFIO TCOREF V REFIOCR RREFIO 0.125 10 1.13 1.22 ±50 1.250 1.3 V ppm/°C V k FTIMD fOUT1 = 9MHz, -6dB FS, fOUT2 = 10MHz, -6dB FS fOUT1 = 49MHz, -12dB FS, fOUT2 = 50MHz, -12dB FS 69 MIN TYP 82 79 73 77 72 66 67 65 65 63 82 -85 dBc -83 -78 dBc dBc dBc MAX UNITS
MAX5888
Spurious-Free Dynamic Range to Nyquist
fCLK = 300MHz fOUT = 32MHz, -12dB FS fCLK = 184.32MHz (Note 2)
ACLR BW-1dB
fOUT = 61.44MHz
73 450
dB MHz
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3
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