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Part: MAX5205AEUB
Category:
Data Conversion
-> DAC (Digital to Analog Converters)
Description: MAX5204, MAX5205, MAX5206, MAX5207 Low-Cost, Voltage-Output, 16-Bit DACs in µMAX
Company: Maxim Integrated Products
Datasheet: Download MAX5205AEUB datasheet File size : 308 kB
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Datasheet text preview:
19-2658; Rev 0; 10/02
Low-Cost, Voltage-Output, 16-Bit DACs in µMAX
General Description
The MAX5204MAX5207 serial input, voltage-output 16bit digital-to-analog converters (DACs) provide monotonic 16-bit output over temperature without any adjustments. T h e MAX5204/MAX5205 operate from a +5V single power supply and use an external reference ranging from +4V to VDD, while the MAX5206/MAX5207 operate from a +3V or +3.3V single power supply and use an e x t e r n a l reference ranging from +2V to V D D . The MAX5204MAX5207 DAC output range is typically from 0 to VDD. The MAX5204MAX5207 feature a hardware reset input (CLR) that when pulled low clears the output to zero code 0000 hex (MAX5205/MAX5207) or resets the output to midscale code 8000 hex (MAX5204/MAX5206). The 3-wire serial interface is compatible with SPITM/QSPITM/MICROWIRETM. All devices have a lowpower shutdown mode that reduces the supply current consumption to 1µA. The MAX5204MAX5207 are available in a space-saving 10-pin µMAX package and are guaranteed over the extended temperature range (-40°C to +105°C). Refer to the MAX5200MAX5203 data sheet for internal reference versions. o Guaranteed 16-Bit Monotonic o 10-Pin 5mm 3mm µMAX Package o Rail-to-Rail® Output Amplifier o Single-Supply Operation +5V (MAX5204/MAX5205) +3V, +3.3V (MAX5206/MAX5207) o Low Power Consumption: 0.5mA o Shutdown Mode Reduces Supply Current to 1µA o SPI/QSPI/MICROWIRE-Compatible 3-Wire Serial Interface o Power-On-Reset Sets Output to Midscale (MAX5204/MAX5206) Zero-Scale (MAX5205/MAX5207)
Features
MAX5204MAX5207
Ordering Information
PART MAX5204AEUB MAX5204BEUB MAX5204ACUB MAX5205AEUB MAX5205BEUB MAX5205ACUB MAX5206AEUB TEMP RANGE -40°C to +105°C -40°C to +105°C 0°C to +105°C -40°C to +105°C -40°C to +105°C 0°C to +105°C -40°C to +105°C -40°C to +105°C 0°C to +105°C -40°C to +105°C -40°C to +105°C 0°C to +105°C PIN-PACKAGE 10 µMAX 10 µMAX 10 µMAX 10 µMAX 10 µMAX 10 µMAX 10 µMAX 10 µMAX 10 µMAX 10 µMAX 10 µMAX 10 µMAX
Applications
Low-Cost VCO/VCXO Frequency Control Industrial Process Control High-Resolution Offset Adjustment
Pin Configuration
TOP VIEW
CLR 1 REF AGND VDD OUT 2 3 4 5 10 DGND 9 SCLK DIN LDAC CS
MAX5206BEUB MAX5206ACUB MAX5207AEUB MAX5207BEUB MAX5207ACUB
MAX5204 MAX5207
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Selector Guide appears at end of data sheet. SPI/QSPI are trademarks of Motorola, Inc. MICROWIRE is a trademark of National Semiconductor Corp. Rail-to-Rail is a registered trademark of Motorola Nippon, Ltd.
µMAX
________________________________________________________________ Maxim Integrated Products
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For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim's website at www.maxim-ic.com.
Low-Cost, Voltage-Output, 16-Bit DACs in µMAX MAX5204MAX5207
ABSOLUTE MAXIMUM RATINGS
VDD to AGND, DGND .....-0.3V to +6V AGND to DGND.........-0.3V to +0.3V REF, OUT to AGND...-0.3V to (VDD + 0.3V) CLR, LDAC, SCLK, DIN, CS to DGND .......-0.3V to (VDD + 0.3V) Maximum Current into Any Pin...........50mA Continuous Power Dissipation (TA = +70°C) 10-Pin µMAX (derate 5.6mW/°C above +70°C) .........444.4mW Operating Temperature Ranges MAX520_CUB ....0°C to +105°C MAX520_EUB ......-40°C to +105°C Junction Temperature ......+150°C Storage Temperature Range .....-60°C to +150°C Lead Temperature (soldering, 10s) .........+300°C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS--MAX5204/MAX5205
(VDD = +4.75V to +5.25V, fSCLK = 10MHz (50% duty cycle), VREF = 4.096V, output load = 10k in parallel with 250pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER STATIC PERFORMANCE (Note 1) Resolution Integral Nonlinearity (Note 2) N MAX520_AEUB INL MAX520_ACUB MAX520_BEUB MAX520_A_UB (Note 3) Differential Nonlinearity (Note 2) Offset Error Gain Error Offset Temperature Coefficient Gain Temperature Coefficient Power-Supply Rejection DYNAMIC PERFORMANCE DAC Output Range Output-Voltage Slew Rate Output Settling Time Output Noise DAC Glitch Impulse Digital Feedthrough Wake-Up Time Power-Up Time SR To ±1LSB of FS, VSTEP = 0.25 × VREF to 0.75 × VREF DAC code = 8400 hex, 10kHz Major carry transition (code 7FFF hex to code 8000 hex) Code = 0000 hex; CS = VDD; LDAC = 0; SCLK, DIN = 0 or VDD From software shutdown to 90% of output code = FFFF hex From power applied to 90% of output code = FFFF hex (Note 2) 0 to VDD 0.6 25 120 10 10 50 10 V V/µs µs nV/Hz nVs nVs µs ms PSR VDD = 5V ±5%, midscale input GE DNL MAX520_BEUB (0°C to +105°C) (Note 3) MAX520_BEUB (-40°C to 0°C) Inferred from measurement at 1C00 hex and FFFF hex Within DAC output range (Note 4) ±3 ±0.01 1.5 3 ±0.06 ±0.5 16 ±10 ±10 ±20 ±20 ±20 ±40 ±1 ±1 ±2 ±25 ±1 mV %FSR µV/°C ppm of FSR/°C mV/V LSB LSB Bits SYMBOL CONDITIONS MIN TYP MAX UNITS
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Low-Cost, Voltage-Output, 16-Bit DACs in µMAX
ELECTRICAL CHARACTERISTICS--MAX5204/MAX5205 (continued)
(VDD = +4.75V to +5.25V, fSCLK = 10MHz (50% duty cycle), VREF = 4.096V, output load = 10k in parallel with 250pF, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)
PARAMETER REFERENCE INPUT VREF Input Range VREF Input Current VREF Input Resistance Input Capacitance DIGITAL INPUTS (DIN, SCLK, CS, CLR, LDAC) Input High Voltage Input Low Voltage Input Hysteresis Input Leakage Input Capacitance POWER REQUIREMENTS Positive Power Supply Positive Supply Current Shutdown Supply Current TIMING CHARACTERISTICS SCLK Frequency SCLK Clock Period SCLK Pulse Width High SCLK Pulse Width Low DIN Setup Time DIN Hold Time CS Fall to SCLK Rise Setup Time SCLK Rise to CS Rise Hold Time SCLK Rise to CS Fall Ignore CS Rise to SCLK Rise Ignore LDAC Pulse Width CS Rise to LDAC Low Setup SCLK Fall to CS Fall Ignore CS Pulse Width Low for Shutdown CS Pulse Width High fS C L K tCP tCH tCL tDS tDH tCSS tCSH tCS0 tCS1 tLDAC tL D A C S tC S O L tCSWL tCSWH 100 40 40 40 0 40 0 10 40 40 40 10 40 100 10 MHz ns ns ns ns ns ns ns ns ns ns ns ns ns ns VDD IDD ISHDN All digital inputs at 0 or VDD (Note 5) All digital inputs at 0 or VDD 4.75 0.8 1 5.25 1.5 10 V mA µA VIH VIL V HYST IIN CIN Digital inputs = 0 or VDD 15 200 ±1 2.4 0.8 V V mV µA pF 4.0 40 100 18 VDD V µA k pF SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX5204MAX5207
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