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Part: PDM4M4040S-20
Category: Memory -> SRAM -> Modules -> SRAM Module
Description: 128kx32 CMOS Static RAM Module
Company: IXYS Corporation
Datasheet: Download PDM4M4040S-20 datasheet File size : 333 kB
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Datasheet text preview:
PDM4M4040
128K x 32 CMOS Static RAM Module
Features
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1 2 3 4 5 6 7
Description
The PDM4M4040 is a 128K x 32 static RAM module constructed on an epoxy laminate (FR-4) substrate using four 128K x 8 static RAMs in plastic SOJ packages. The PDM4M4040 is available with access times as fast as 12 ns with minimal power consumption. The PDM4M4040 is packaged in a 64-pin FR-4 ZIP (Zig-zag In- line vertical Package) or a 64-pin SIMM (Single In-line Memory Module). The ZIP configuration allows 64 pins to be placed on a package 3.65" long and 0.21" wide. At only 0.60" high, this low-profile package is ideal for systems with minimum board spacing. The SIMM configuration allows use of edge mounted sockets to secure the module. All inputs and outputs of the PDM4M4040 are TTL compatible and operate from a single 5V supply. Full asynchronous circuitry requires no clock or refresh for operation and provides equal access and cycle times for ease of use.
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High density 4 megabit Static RAM module Low profile 64-pin ZIP (Zig-zag In-line vertical Package) or 64-pin SIMM (Single In-line Memory Module) Fast access time: 12 ns (max.) Surface mounted plastic components on an epoxy laminate (FR-4) substrate Single 5V (±10%) power supply Multiple VSS pins and decoupling capacitors for maximum noise immunity Inputs/outputs directly TTL compatible
Functional Block Diagram
8
CS1 CS2 CS3 CS4
9 10 11
ADDRESS
17 128K x 32 RAM
WE OE
8
8
8
8
I/O31-I/O0
12
8-35
Rev 2.2 -1/15/96
PDM4M4040 Pin Configuration(1)
PD0 I I/O0 I/O1 I/O2 V3 /O Ac c A7 A8 I9 I/O4 I/O5 I/O6 /W 7 O AE C 14 CS1 AS3 V16 I ss I/O16 I/O17 I/O18 /O19 A A10 A11 A12 I 13 I/O20 I/O21 I/O22 /O23 V ss 2 6 4 8 1 10 12 14 16 28 20 22 24 26 38 30 32 ZIP, SIMM
TOP VIEW
Pin Assignment
3 1 5 7 9 1 11 13 15 17 29 21 23 25 27 39 31 33 35 37 49 41 43 45 47 59 51 53 55 57 69 61 3 P Vss I D1 I/O8 I/O9 I/O10 AO11 / A0 A1 I2 I/O12 I/O13 I/O14 VO15 / Ass C15 CS2 NS4 OC IE I/O24 I/O25 I/O26 AO27 / A3 A4 V5 Acc I6 I/O28 I/O29 I/O30 /O31 PD0 - Vss PD1 - NC
Pin
I/O31-I/O0 A16-A0
CS
Signal
Data Inputs/Outputs Addresses Chip Selects Write Enable Output Enable Power Ground No Connect
4-CS1
WE OE
VCC VSS NC
34 36 48 40 42 44 46 58 50 52 54 56 68 60 62 4
8-36
Rev 2.2 - 1/15/96
PDM4M4040
Truth Table
Mode Deselect/ Power-down Read Write Deselect
CS OE WE
Output High-Z DATAOUT DATAIN High-Z
Power Standby Active Active Active
1 2 3
H L L L
X L X H
X H L H
Absolute Maximum Ratings(1)
Symbol VTERM TBIAS TSTG TA PT IOUT Rating Terminal Voltage with Respect to VSS Temperature Under Bias Storage Temperature Operating Temperature Power Dissipation DC Output Current Com'l. 0.5 to +7.0 10 to +85 55 to +125 0 to +70 1.0 50 Ind. 0.5 to +7.0 10 to +85 65 to +150 0 to +70 1.0 50 Unit V °C °C °C W mA
4 5 6 7 8
NOTE: 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Recommended DC Operating Conditions
Symbol VCC VSS Commercial Parameter Supply Voltage Supply Voltage Ambient Temperature Min. 4.75 0 0 Typ. 5.0 0 25 Max. 5.25 0 70 Unit V V °C
9 10 11 12
Rev 2..2 - 1/15/96
8-37
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