Description: DDR-II (Burst of 2) CIO Synchronous SRAMs<<<>>>The 36Mb IS61DDB21M36 and<<<>>>IS61DDB22M18 are synchronous, high-performance<<<>>>CMOS static random access memory<<<>>>(SRAM) devices. These SRAMs have a common I/O<<<>>>bus. The rising edge of K clock initiates the<<<>>>read/write operation, and all internal operations are<<<>>>self-timed.
