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Part: IS41LV44002-50JI

Category:
 Memory
   -> DRAM
     -> EDO/FPM DRAM

Description: 3.3V 4M X 4(16-MBIT) Dynamic RAM With Edo Page Mode

Company: Integrated Silicon Solution

Datasheet: Download IS41LV44002-50JI datasheet     File size : 134 kB

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Datasheet text preview:
IS41C4400X IS41LV4400X SERIES
4M x 4 (16-MBIT) DYNAMIC RAM WITH EDO PAGE MODE
FEATURES
· Extended Data-Out (EDO) Page Mode access cycle · TTL compatible inputs and outputs · Refresh Interval:
­ 2,048 cycles/32 ms ­ 4,096 cycles/64 ms Refresh Mode: RAS-Only, CAS-before-RAS (CBR), and Hidden Single power supply: ­ 5V±10% or 3.3V ± 10% Byte Write and Byte Read operation via two CAS Industrial temperature range -40°C to 85°C
ISSI
JUNE, 2001
®
DESCRIPTION
The ISSI 4400 Series is a 4,194,304 x 4-bit high-performance CMOS Dynamic Random Access Memory. These devices offer an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 2,048 or 4096 random accesses within a single row with access cycle time as short as 20 ns per 4-bit word. These features make the 4400 Series ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications. The 4400 Series is packaged in a 24-pin 300-mil SOJ with JEDEC standard pinouts.
· · · ·
PRODUCT SERIES OVERVIEW
Part No. IS41C44002 IS41C44004 IS41LV44002 IS41LV44004 Refresh 2K 4K 2K 4K Voltage 5V ± 10% 5V ± 10% 3.3V ± 10% 3.3V ± 10%
KEY TIMING PARAMETERS
Parameter RAS Access Time (tRAC) CAS Access Time (tCAC) Column Address Access Time (tAA) EDO Page Mode Cycle Time (tPC) Read/Write Cycle Time (tRC) -50 50 13 25 20 84 -60 60 15 30 25 104 Unit ns ns ns ns ns
PIN CONFIGURATION
24 Pin SOJ
PIN DESCRIPTIONS
A0-A11
VCC I/O0 I/O1 WE RAS *A11(NC) A10 A0 A1 A2 A3 VCC 1 2 3 4 5 6 7 8 9 10 11 12 24 23 22 21 20 19 18 17 16 15 14 13 GND I/O3 I/O2 CAS OE A9 A8 A7 A6 A5 A4 GND
Address Inputs (4K Refresh) Address Inputs (2K Refresh) Data Inputs/Outputs Write Enable Output Enable Row Address Strobe Column Address Strobe Power Ground No Connection
A0-A10 I/O0-3 WE OE RAS CAS Vcc GND NC
* A11 is NC for 2K Refresh devices.
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. -- 1-800-379-4774
Rev. D 06/24/01
1
IS41C4400X IS41LV4400X SERIES
FUNCTIONAL BLOCK DIAGRAM
OE WE CAS CONTROL LOGIC WE CONTROL LOGICS OE CONTROL LOGIC OE
ISSI
®
CAS
CAS
WE
RAS
RAS CLOCK GENERATOR
DATA I/O BUS
REFRESH COUNTER
DATA I/O BUFFERS
ROW DECODER
RAS
COLUMN DECODERS SENSE AMPLIFIERS
I/O0-I/O3
MEMORY ARRAY 4,194,304 x 4
ADDRESS BUFFERS A0-A10(A11)
TRUTH TABLE
Function Standby Read Write: Word (Early Write) Read-Write EDO Page-Mode Read 1st Cycle: 2nd Cycle: EDO Page-Mode Write 1st Cycle: 2nd Cycle: EDO Page-Mode 1st Cycle: Read-Write 2nd Cycle: Hidden Refresh Read W r i t e (1) RAS-Only Refresh CBR Refresh
Note: 1. EARLY WRITE only.
RAS H L L L L L L L L L LHL LHL L HL
CAS H L L L HL HL HL HL HL H L L L H L
WE X H L HL H H L L HL HL H L X X
OE X L X LH L L X X LH LH L X X X
Address tR/tC X ROW/COL ROW/COL ROW/COL ROW/COL NA/COL ROW/COL NA/COL ROW/COL NA/COL ROW/COL ROW/COL ROW/NA X
I/O High-Z DOUT DIN DOUT, DIN DOUT DOUT DIN DIN DOUT, DIN DOUT, DIN DOUT DOUT High-Z High-Z
2
Integrated Silicon Solution, Inc. -- 1-800-379-4774
Rev. D 06/24/01
IS41C4400X IS41LV4400X SERIES
Functional Description
T h e IS41C4400x and IS41LV4400x are CMOS D R A M s optimized for high-speed bandwidth, low power applications. During READ or WRITE cycles, each bit is uniquely addressed through the 11 or 12 address bits. These are entered 11 bits (A0-A10) at a time for the 2K refresh device or 12 bits (A0-A11) at a time for the 4K refresh device. The row address is latched by the Row Address Strobe (RAS). The column address is latched by the Column Address Strobe (CAS). RAS is used to latch the first nine bits and CAS is used the latter ten bits.
ISSI
Auto Refresh Cycle
®
To retain data, 2,048 refresh cycles are required in each 32 ms period, or 4,096 refresh cycles are required in each 64ms period. There are two ways to refresh the memory: 1. By clocking each of the 2,048 row addresses (A0 through A10) or 4096 row addresses (A0 through A11) with RAS at least once every 32 ms or 64ms respectively. Any read, write, read-modify-write or RAS-only cycle refreshes the addressed row. 2. Using a CAS-before-RAS refresh cycle. CAS-before-RAS refresh is activated by the falling edge of RAS, while holding CAS LOW. In CAS-before-RAS refresh cycle, an internal 9-bit counter provides the row addresses and the external address inputs are ignored. CAS-before-RAS is a refresh-only mode and no data access or device selection is allowed. Thus, the output remains in the High-Z state during the cycle.
Memory Cycle
A memory cycle is initiated by bring RAS LOW and it is terminated by returning both RAS and CAS HIGH. To ensures proper device operation and data integrity any memory cycle, once initiated, must not be ended or aborted before the minimum tRAS time has expired. A new cycle must not be initiated until the minimum precharge time tRP, tCP has elapsed.
Read Cycle
A read cycle is initiated by the falling edge of CAS or OE, whichever occurs last, while holding WE HIGH. The column address must be held for a minimum time specified by tAR. Data Out becomes valid only when tRAC, tAA, tCAC and tOEA are all satisfied. As a result, the access time is dependent on the timing relationships between these parameters.
Power-On
After application of the VCC supply, an initial pause of 200 µs is required followed by a minimum of eight initialization cycles (any combination of cycles containing a RAS signal). During power-on, it is recommended that RAS track with VCC or be held at a valid VIH to avoid current surges.
Write Cycle
A write cycle is initiated by the falling edge of CAS and WE, whichever occurs last. The input data must be valid at or before the falling edge of CAS or WE, whichever occurs last.
Integrated Silicon Solution, Inc. -- 1-800-379-4774
Rev. D 06/24/01
3


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