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Part: IS41C16257-60TI
Category:
Memory
-> DRAM
-> EDO/FPM DRAM
Description: 256K X 16(4-MBIT) Dynamic RAM With Fast Page Mode
Company: Integrated Silicon Solution
Datasheet: Download IS41C16257-60TI datasheet File size : 152 kB
Request For quote: Find where to buy IS41C16257-60TI
Datasheet text preview:
IS41C16257 IS41LV16257
256K x 16 (4-MBIT) DYNAMIC RAM WITH FAST PAGE MODE
FEATURES
· · · · · · Fast access and cycle time TTL compatible inputs and outputs Refresh Interval: 512 cycles/8 ms Refresh Mode: RAS-Only, CAS-before-RAS (CBR), and Hidden JEDEC standard pinout Single power supply: -- 5V ± 10% (IS41C16257) -- 3.3V ± 10% (IS41LV16257) Byte Write and Byte Read operation via two CAS Industrial temperature available
ISSI
MAY 1999
®
DESCRIPTION
The ISSI IS41C16257 and the IS41LV16257 are 262,144 x 16-bit high-performance CMOS Dynamic Random Access Memories. Fast Page Mode allows 512 random accesses within a single row with access cycle time as short as 12 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes these devices ideal for use in 16- and 32-bit wide data bus systems. These features make the IS41C16257 and the IS41LV16257 ideally suited for high band-width graphics, digital signal processing, high-performance computing systems, and peripheral applications. The IS41C16257 and the IS41LV16257 are packaged in a 40-pin, 400-mil SOJ and TSOP (Type II).
· ·
KEY TIMING PARAMETERS
Parameter Max. RAS Access Time (tRAC) Max. CAS Access Time (tCAC) Max. Column Address Access Time (tAA) Min. Fast Page Mode Cycle Time (tPC) Min. Read/Write Cycle Time (tRC) -35 35 10 18 12 60 -60 60 15 30 25 110 Unit ns ns ns ns ns
ISSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 1999, Integrated Silicon Solution, Inc.
Integrated Silicon Solution, Inc. -- 1-800-379-4774
DR004-1B 05/24/99
1
IS41C16257 IS41LV16257
FUNCTIONAL BLOCK DIAGRAM
OE WE LCAS UCAS CAS CLOCK GENERATOR WE CONTROL LOGICS OE CONTROL LOGIC OE
ISSI
CAS WE
®
RAS
RAS CLOCK GENERATOR
DATA I/O BUS
REFRESH COUNTER
DATA I/O BUFFERS
ROW DECODER
RAS
COLUMN DECODERS SENSE AMPLIFIERS
I/O0-I/O15
MEMORY ARRAY 262,144 x 16
ADDRESS BUFFERS A0-A8
PIN CONFIGURATIONS 40-Pin TSOP (Type II)
VCC I/O0 I/O1 I/O2 I/O3 VCC I/O4 I/O5 I/O6 I/O7 1 2 3 4 5 6 7 8 9 10 40 39 38 37 36 35 34 33 32 31 GND I/O15 I/O14 I/O13 I/O12 GND I/O11 I/O10 I/O9 I/O8
PIN DESCRIPTIONS 40-Pin SOJ
VCC I/O0 I/O1 I/O2 I/O3 VCC I/O4 I/O5 I/O6 I/O7 NC 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 GND I/O15 I/O14 I/O13 I/O12 GND I/O11 I/O10 I/O9 I/O8 NC LCAS UCAS OE A8 A7 A6 A5 A4 GND
A0-A8 I/O0-I/O15
Address Inputs Data Inputs/Outputs Write Enable Output Enable Row Address Strobe Upper Column Address Strobe Lower Column Address Strobe Power Ground No Connection
WE OE RAS
UCAS
LCAS
Vcc GND NC
NC NC WE RAS NC A0 A1 A2 A3 VCC
11 12 13 14 15 16 17 18 19 20
30 29 28 27 26 25 24 23 22 21
NC LCAS UCAS OE A8 A7 A6 A5 A4 GND
NC WE RAS NC A0 A1 A2 A3 VCC
2
Integrated Silicon Solution, Inc. -- 1-800-379-4774
DR004-1B 05/24/99
IS41C16257 IS41LV16257
TRUTH TABLE
Function Standby Read: Word Read: Lower Byte Read: Upper Byte Write: Word (Early Write) Write: Lower Byte (Early Write) Write: Upper Byte (Early Write) Read-Write(1,2) Hidden Refresh2)
ISSI
RAS
H L L L L L L L Read LHL Write LHL L HL
®
LCAS UCAS
H L L H L L H L L L H L H L H L L H L L L L H L
WE
X H H H L L L HL H L X X
OE
X L L L X X X LH L X X X
Address tR/tC X ROW/COL ROW/COL ROW/COL ROW/COL ROW/COL ROW/COL R OW/COL R OW/COL R OW/ C OL ROW/NA X
RAS-Only Refresh
CBR Refresh(3)
I/O High-Z DOUT Lower Byte, DOUT Upper Byte, High-Z Lower Byte, High-Z Upper Byte, DOUT DIN Lower Byte, DIN Upper Byte, High-Z Lower Byte, High-Z Upper Byte, DIN DOUT, DIN DOUT DOUT High-Z High-Z
Notes: 1. These WRITE cycles may also be BYTE WRITE cycles (either LCAS or UCAS active). 2. These READ cycles may also be BYTE READ cycles (either LCAS or UCAS active). 3. At least one of the two CAS signals must be active (LCAS or UCAS).
Integrated Silicon Solution, Inc. -- 1-800-379-4774
DR004-1B 05/24/99
3
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