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Part: IS24C128-3Z-TR
Category:
Memory
-> ROM
-> EEPROM
-> Serial
-> Two-Wire Serial EEPROM
Description: 128K16Kx8
Company: Integrated Silicon Solution
Datasheet: Download IS24C128-3Z-TR datasheet File size : 157 kB
Request For quote: Find where to buy IS24C128-3Z-TR
Datasheet text preview:
IS24C128-2/3 IS24C256-2/3
262,144-bit/131,072-bit 2-WIRE SERIAL CMOS EEPROM
FEATURES
· Low Power CMOS Technology Standby Current less than 10 µA (5.5V) Read Current (typical) less than 1 mA (5.5V) Write Current (typical) less than 3 mA (5.5V) · Low Voltage Operation IS24C256-2 & IS24C128-2: Vcc = 1.8V to 5.5V IS24C256-3 & IS24C128-3: Vcc = 2.5V to 5.5V · 100 KHz (1.8V), 400 KHz (2.5V) and 1MHz (5V) Compatibility · Hardware Data Protection Write Protect Pin · Sequential Read Feature · Filtered Inputs for Noise Suppression
ISSI
· Self time write cycle with auto clear 5 ms @ 2.5V · Organization: IS24C256-2 and IS24C256-3: 32,768x8 IS24C128-2 and IS24C128-3: 16,384x8 · 64-Byte Page Write Buffer · Two-Wire Serial Interface Bi-directional data transfer protocol · High Reliability Endurance: 1,000,000 Cycles Data Retention: 100 Years · Commercial and Industrial temperature ranges · 8-pin PDIP, 8-Pin SOIC, and 14-pin TSSOP
®
ADVANCED INFORMATION JULY 2002
PRODUCT OFFERING OVERVIEW
Part No IS24C256-2 IS24C256-3 IS24C128-2 IS24C128-3 Voltage 1.8V-5.5V 2.5V-5.5V 1.8V-5.5V 2.5V-5.5V Speed 100 KHz 400 KHz 100 KHz 400 KHz Standby ICC < 5 µA < 10 µA < 5 µA < 10 µA Read ICC 1 mA 1 mA 1 mA 1 mA Write ICC 3 mA 3 mA 3 mA 3 mA Temperature C,I C,I C,I C,I
DESCRIPTION
The IS24C128-2 is a 1.8V (1.8V-5.5V) 128K-bit (16384 x 8) Electrically Erasable PROM, IS24C128-3 is a 2.5V (2.5V5.5V) 128K-bit (16384 x 8) Electrically Erasable PROM, IS24C256-2 is a 1.8V (1.8V-5.5V) 256K-bit (32768 x 8) Electrically Erasable PROM and the IS24C256-3 is a 2.5V (2.5V-5.5V) 256K-bit (32768 x 8) Electrically Erasable PROM. The IS24CXXX (IS24C128-2, IS24C128-3, IS24C256-2 and IS24C1256-3) family is a low-cost and low voltage 2wire Serial EEPROM. It is fabricated using ISSI's advanced CMOS EEPROM technology and provides a low power and low voltage operation. The IS24CXXX family features a write protection feature, and is available in 8-pin DIP, 8pin SOIC, and 14-pin TSSOP packages.
Copyright © 2002 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on any published information and before placing orders for products.
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
ADVANCED INFORMATION 07/02/02 Rev. 00B
1
IS24C128-2/3 IS24C256-2/3
FUNCTIONAL BLOCK DIAGRAM
ISSI
®
Vcc
8
HIGH VOLTAGE GENERATOR, TIMING & CONTROL
SDA SCL WP
5
7
X DECODER
6
CONTROL LOGIC SLAVE ADDRESS REGISTER & COMPARATOR
EEPROM ARRAY
A0 A1
1 2
WORD ADDRESS COUNTER
Y DECODER
GND
4
ACK
Clock DI/O
>
nMOS
DATA REGISTER
2
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
ADVANCED INFORMATION Rev. 00B 07/02/02
IS24C128-2/3 IS24C256-2/3
PIN CONFIGURATION 8-Pin DIP and SOIC
ISSI
14-pin TSSOP
®
A0
A0 A1 NC GND
1 2 3 4
8 7 6 5
VCC WP SCL SDA
A1 NC NC NC NC GND
1 2 3 4 5 6 7
14 13 12 11 10 9 8
VCC WP NC NC NC SCL SDA
PIN DESCRIPTIONS
A0-A1 SDA SCL WP Vcc GND Address Inputs Serial Address/Data I/O Serial Clock Input Write Protect Input Power Supply Ground drain output and can be wire-Ored with other open drain or open collector outputs. The SDA bus requires a pullup resistor to Vcc.
A0, A1
The A0, and A1 are the device address inputs that are hardwired or left not connected for hardware compatibility with the 24C32/64. When pins are hardwired, as many as four 128K/265K devices may be addressed on a single bus system. When the pins are not hardwired, the default A0 and A1 are zero.
SCL
This input clock pin is used to synchronize the data transfer to and from the device.
WP
WP is the Write Protect pin. If the WP pin is tied to Vcc the entire array becomes Write Protected (Read only). When WP is tied to GND or left floating normal read/write operations are allowed to the device.
SDA
The SDA is a Bi-directional pin used to transfer addresses and data into and out of the device. The SDA pin is an open
Integrated Silicon Solution, Inc. -- www.issi.com -- 1-800-379-4774
ADVANCED INFORMATION 07/02/02 Rev. 00B
3
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