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Part: ISL6552CB
Category:
Power Management
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Description: Microprocessor Core Voltage Regulator Multi-phase Buck PWM Controller
Company: Intersil Corporation
Datasheet: Download ISL6552CB datasheet File size : 476 kB
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Datasheet text preview:
ISL6552
TM
Da ta S h eet
No ve mb er 200 0
Fi l e N um be r
49 18
Microprocessor CORE Voltage Regulator Multi-Phase Buck PWM Controller itle L65 ) bjec icro cess RE ltag gula ltiase ck M ntr o r) utho ) eyw s tersi rpor on, ico ucto cpi, wer nag ent, tantl ailab red
The ISL6552 multi-phase PWM control IC together with its companion gate drivers, the HIP6601, HIP6602 or HIP6603 and external Intersil MOSFETs provides a precision voltage regulation system for advanced microprocessors. Multiphase power conversion is a marked departure from earlier single phase converter configurations previously employed to satisfy the ever increasing current dem ands of modern microprocessors. Multi-phase converters, by distributing the power and load current results in smaller and lower cost transistors with fewer input and output capacitors. These reductions accrue from the higher effective conversion frequency with higher frequency ripple current due to the phase interleaving process of this topology. For exam ple, a three phase converter operating at 350kHz will have a ripple frequency of 1.05MHz. Moreover, greater converter bandwidth of this design results in faster response to load transients. Outstanding features of this controller IC include programmable VID codes from the microprocessor that range from 1.05V to 1.825V with a system accuracy of ±1%. Pull up currents on these VID pins eliminates the need for external pull up resistors. In addition "droop" compensation, used to reduce the overshoot or undershoot of the CORE voltage, is easily programmed with a single resistor. Another feature of this controller IC is the PGOOD monitor circuit which is held low until the CORE voltage increases, during its Soft-Start sequence, to within 10% of the programmed voltage. Over-voltage, 15% above program med CORE voltage, results in the converter shutting down and turning the lower MOSFETs ON to clamp and protect the microprocessor. Under voltage is also detected and results in PGO OD low if the COR E voltage falls 10% below the programmed level. Over-current protection reduces the regulator RMS output current to 41% of the program med over-current trip value. These features provide monitoring and protection for the microprocessor and power system.
Features
· M ulti-Phase Power Conversion · Precision Channel Current Sharing - Loss Less Current Sampling - Uses rDS(ON) · Precision CORE Voltage Regulation - ±1% System Accuracy Over Temperature · M icroprocessor Voltage Identification Input - 5-Bit VID Input - 1.05V to 1.825V in 25mV Steps - Programm able "Droop" Voltage · Fast Transient Recovery Time · Over Current Protection · Autom atic Selection of 2, 3, or 4 Phase Operation · High Ripple Frequency (Channel Frequency) Times Number Channels . . . . . . . . . . . . . . . . . . 100kHz to 6MHz
Ordering Information
P ART NU MBE R IS L6552CB IS L6552CB -T TEMP. (oC) 0 to 70 P ACKAGE 20 Ld SOIC P K G . NO . M20.3
20 Ld SOIC Tape and Reel
Pinout
ISL6552 (SOIC) TOP VIE W
VID3 1 VID2 2 VID1 3 VID0 4 VID25mV 5 COMP 6 FB 7 FS/DIS 8 G ND 9 VSEN 10 20 VCC 19 PGOOD 18 PWM4 17 ISEN4 16 ISEN1 15 PWM1 14 PWM2 13 ISEN2 12 ISEN3 11 PWM3
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000
ISL6552 Block Diagram
PGOOD V CC
POWER-ON RESET (POR) VSEN X 0.9 + UV OV LATC H S
-
TH REE STATE CL O CK AND SAWTOOTH GENERATOR +
FS/EN
OVP + X1.15
-
PWM
-
+
PWM1
-
SOFTSTART AND FAULT LOGIC
+
PWM
-
+
PWM2
-
COMP +
PWM
VID3 VID2 VID1 VID0 VID2 5mV D/A + E/A +
+
PWM3
-
PWM +
-
-
PWM4
-
FB
CURRE NT CORRECTION I_TOT + + + +
PHASE NUMBER
CHANNEL DETECTOR
ISEN1 ISEN2 ISEN3 ISEN4
+ I_TRIP
-
OC
GND
2
ISL6552 Simplified Power System Diagram
VSEN PWM 1
SYNCHRONOUS RECTIFIED BUCK CHANNEL
PWM 2
SYNCHRONOUS RECTIFIED BUCK CHANNEL MICROPROCESSOR
ISL6552
PWM 3 PWM 4 SYNCHRONOUS RECTIFIED BUCK CHANNEL
VID
SYNCHRONOUS RECTIFIED BUCK CHANNEL
Functional Pin Description
VID3 1 VID2 2 VID1 3 VID0 4 VID25mV 5 COMP 6 FB 7 FS/DIS 8 G ND 9 VSEN 10 20 VCC 19 PGOOD 18 PWM4 17 ISEN4 16 ISEN1 15 PWM1 14 PWM2 13 ISEN2 12 ISEN3 11 PWM3
converter. Pulling this pin to ground disables the converter and three states the PWM outputs. See Figure 10.
GND (Pin 9)
Bias and reference ground. All signals are referenced to this pin.
VSEN (Pin 10)
Power good monitor input. Connect to the microprocessorCORE voltage.
PWM1 (Pin 15), PW M2 (Pin 14), PWM3 (Pin 11) and P WM 4 (P i n 18)
PWM outputs for each driven channel in use. Connect these pins to the PWM input of a HIP6601/2/3 driver. For system s which use 3 channels, connect PWM4 high. Two channel systems connect PWM 3 and PWM4 high.
VID3 (Pin 1), VID2(Pin 2), VID1(Pin 3), VID0(Pin 4) and VID25mV (Pin 5)
Voltage Identification inputs from microprocessor. These pins respond to TTL and 3.3V logic signals. The ISL6552 decodes VID bits to establish the output voltage. See Table 1.
ISEN1 (Pin 16), ISEN 2 (Pin 13), ISEN3 (Pin 12) and ISEN4 (Pin 17)
Current sense inputs from the individual converter channel's phase nodes. Unused sense lines MUST be left open.
COMP (Pin 6)
Output of the internal error amplifier. Connect this pin to the external feedback and compensation network.
P GOO D ( P i n 19)
Power good. This pin provides a logic-high signal when the microprocessor CORE voltage (VSEN pin) is within specified lim its and Soft-Start has timed out.
FB (Pin 7)
Inverting input of the internal error amplifier.
FS/DIS (Pin 8)
Channel frequency, FSW, select and disable. A resistor from this pin to ground sets the switching frequency of the
V C C ( P i n 20)
Bias supply. Connect this pin to a 5V supply.
3
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