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Part: EL9110IU-T13
Category:
Description: Differential Receiver (5 Pole) And Equalizer, CAT-5, Tr-state Output, 150MHz, 5V @ 33mA
Company: Intersil Corporation
Datasheet: Download EL9110IU-T13 datasheet File size : 262 kB
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EL9110
D a ta Sheet J un e 23, 2003 FN7305.1
Differential Receiver/Equalizer
The EL9110 is a single channel differential receiver and equalizer. It contains a high speed differential receiver with 5 programmable poles. The outputs of these pole blocks are then summed into an output buffer. The equalization length is set with the voltage on a single pin. The EL9110 also contains a three-statable output, enabling multiple devices to be connected in parallel and used in a multiplexing application. The gain can be adjusted up or down by 6dB using the VGAIN control signal. In addition, a further 6dB of gain can be switched in to provide a matched drive into a cable. The EL9110 has a bandwidth of 150MHz and consumes just 33mA on ±5V supply. A single input voltage is used to set the compensation levels for the required length of cable. The EL9110 is available in the 16-pin QSOP package and is specified for operation over the full -40°C to +85°C temperature range.
Features
· 150MHz -3dB bandwidth · CAT-5 compensation - 75MHz @ 1000 ft - 125MHz @ 500 ft · 33mA supply current · Differential input range 3.2V · Common mode input range ±4.5V · ±5V supply · Output to within 1.5V of supplies · Available in 16-pin QSOP package
Applications
· Twisted-pair receiving/equalizer · KVM (Keyboard/Video/Mouse) · VGA over twisted-pair · Security video
Ordering Information
PART NUMBER EL9110IU EL9110IU-T7 EL9110IU-T13 PACKAGE 16-Pin QSOP 16-Pin QSOP 16-Pin QSOP TAPE & REEL 7" 13" PKG. DWG. # M DP0040 MDP0040 MDP0040
Pinout
EL9110 (16-PIN QSOP) TOP VIEW
CTRL_REF 1 VCTRL 2 VINP 3 VINM 4 VS- 5 CMOUT 6 VGAIN 7 LOGIC_REF 8 16 CMEXT 15 VS+ 14 ENBL 13 VSA+ 12 VOUT 11 VSA10 0V 9 X2
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2003. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners.
EL9110
Absolute Maximum Ratings (TA = 25°C)
Supply Voltage between VS+ and VS- . . . . . . . . . . . . . . . . . . . . .12V Maximum Continuous Output Current . . . . . . . . . . . . . . . . . . . 30mA Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Curves Pin Voltages . . . . . . . . . . . . . . . . . . . . . . . . . VS- -0.5V to VS+ +0.5V Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C Operating Temperature . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C Lead Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
Electrical Specifications
PARAMETER AC PERFORMANCE BW SR THD Bandwidth Slew Rate
VSA+ = VA+ = +5V, VSA- = VA- = -5V, TA = 25°C, Unless Otherwise Specified CONDITIONS M IN TYP MA X UNIT
DESCRIPTION
(See Figure 1) VIN = -1V to +1V, VG = 0.35, VC = 0, RL = 75 + 75 10MHz 1VP-P out, VG = 0.35V, X2 gain, VC = 0
150 1.5 -50
MHz V /ns dB c
Total Harmonic Distortion
DC PERFORMANCE VOS Offset Voltage X2 gain, no equalization -300 -10 300 mV
INPUT CHARACTERISTICS C M IR C M IRx ONOISE C M RR C M RR+ C M BW CMSLEW CINDIFF RINDIFF CINCM RINCM +IIN -IIN VINDIFF Common-mode Input Range Extended CMIR Output Noise Common-mode Rejection Ratio Common-mode Rejection Ratio CM Amplifier Bandwidth CM Slew Rate Differential Input Capacitance Differential Input Resistance CM Input Capacitance CM Input Resistance Positive Input Current Negative Input Current Differential Input Range Common-mode extension off Common-mode extension on VG = 0.35, X2 gain, 75 + 75 load, VC = 0.6 Measured at 10kHz Measured at 10MHz 10K || 10pF load Measured @ +1V to -1V Capacitance VINP to VINM Resistance VINP to VINM Capacitance VINP = VINM to ground Resistance VINP = VINM to ground DC bias @ VINP = VINM = 0V DC bias @ VINP = VINM = 0V VINP - VINM when slope gain falls to 0.9 2. 5 1 1 -4/+3.5 ±4.5 25 60 50 50 100 600 2. 4 1.2 2. 8 1 1 3.2 V V mV RMS dB dB MHz V/µs fF M pF M µA µA V
OUTPUT CHARACTERISTICS VO IOUT ROUTCM DiffGain SUPPLY ISON ISOFF PSRR Supply Current Supply Current Power Supply Rejection Ratio VENBL = 5, VINM = 0 VENBL = 0, VINM = 0 DC to 100kHz, ±5V supply 27 0. 4 60 34 0.8 mA mA dB Output Voltage Swing Output Drive Current CM Output Resistance Differential Gain RL = 150 RL = 10, VINP = 1V, VINM = 0V, X2 = gain, VG = 0.35 at 100kHz VC = 0, VG = 0.35, X2 = 5, RL = 75 + 75 0.85 50 ±3.5 60 30 1.0 1. 1 V mA
LOGIC CONTROL PINS VHI Logic High Level VIN - VLOGIC ref for guaranteed high level 1.35 V
2
EL9110
Electrical Specifications
PARAMETER VLOW ILOGICH ILOGICL Logic Low Level Logic High Input Current Logic Low Input Current VSA+ = VA+ = +5V, VSA- = VA- = -5V, TA = 25°C, Unless Otherwise Specified (Continued) CONDITIONS VIN - VLOGIC ref for guaranteed low level VIN = 5V, VLOGIC = 0V VIN = 0V, VLOGIC = 0V M IN TYP MA X 0.8 50 15 UNIT V µA µA
DESCRIPTION
Pin Descriptions
PIN NUMBER 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 PIN NAME CTRL_REF V CT RL V INP V INM VSCMOUT VGAIN LO G I C _ R E F X2 0V VSAVOUT VSA+ ENBL VS+ CMEXT Power Output Power Logic Input Power Logic Input PIN TYPE Input Input Input I nput Power Output Input Input Logic Input PIN FUNCTION Reference voltage for VGAIN and VCTRL pins Control voltage (0 to 1V) to set equalization Positive differential input Negative differential input -5V to core of chip Output of common mode voltage present at inputs Control voltage to set overall gain (0 to 1V) Reference voltage for all logic signals Logic signal; low - gain = 1, high - gain = 2 0V reference for output voltage -5V to output buffer Single-ended output voltage reference to pin 10 +5V to output buffer Logic signal to enable pin; low - disabled, high - enabled +5V to core of chip Logic signal to enable CM range extension; active high
3
EL9110 Typical Performance Curves
5 3 GAIN (dB) 1 -1 -3 -5 1M VGAIN=0V VCTRL=0V RLOAD=150 X2=OFF THD (dBc) -40 -45 -50 -55 -60 -65 0.1M VGAIN=0V VCTRL=0V VSS=+5V VEE=-5V RLOAD=150 X2=OFF INP U T=0 dBm
10M FREQUENCY (Hz)
100M
1M
10M
100M
FREQUENCY (Hz)
FIGURE 1. FREQUENCY RESPONSE
FIGURE 2. TOTAL HARMONIC DISTORTION
200mV/DIV
VCTRL=0V VGAIN=0.35V X2=ON CMRR (dBc) 100K
2ns/DIV
1M
10M
100M
FREQUENCY (Hz)
FIGURE 3. RISE TIME
FIGURE 4. COMMON MODE REJECTION
4 2 GAIN (dB) 0 -2 -4
-20 VGAIN=0.35V VCTRL=0V RLOAD=150 X2=ON -PSRR (dB) -40 -60 -80 -100 -120 10
VEE=-5V VCTRL=0V VGAIN=0V INPUTS ON GND
-6 100K
1M
10M
100M
100
1K
10K
100K
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 5. CM AMPLIFIER BANDWIDTH
FIGURE 6. PSRR vs FREQUENCY
4
EL9110 Typical Performance Curves (Continued)
0 -20 +PSRR (dB) -40 -60 -80 100mV STEP -100 10 100 1K 10K 100K 1M 10M 100M 1M 10M FREQUENCY (Hz) VCTRL=0mV 100M VCC=5V VCTRL=0V VGAIN=0V INPUTS ON GND GAIN (dB) 10dB/DIV VCTRL=800mV
FREQUENCY (Hz)
FIGURE 7. PSRR vs FREQUENCY
FIGURE 8. GAIN AS THE FUNCTION OF VCTRL
10ns/DIV POWER DISSIPATION (W) GROUP DELAY (ns)
1.4 1.2 1 0.8 0.6 0.4 0.2 0
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
VCTRL=0mV
791mW
J QS OP 16 58 °C /W
A =1
VCTRL=900mV 100mV STEP 1M 10M FREQUENCY (Hz) 100M 200M
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
FIGURE 9. GROUP DELAY AS THE FUNCTION OF THE FREQUENCY REPONSE CONTROL VOLTAGE (VCTRL)
FIGURE 10. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
1.8 POWER DISSIPATION (W) 1.6 1.4
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
1.2 1.116W 1 0.8 0.6 0.4 0.2 0 0 25 50 75 85 100 125 150
J QS
A =1
OP 16 12 °C /W
AMBIENT TEMPERATURE (°C)
FIGURE 11. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
5
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