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Part: EL5204IY-T7
Category:
Analog & Mixed-Signal Processing
-> Amplifiers
-> Voltage Feedback
Description: Dual, 700MHz Slew Enhanced Voltage Feedback Amplifier With Enable<<<>>>the EL5104, EL5105, EL5204, EL5205, And EL5304 Represent Highspeed Voltage Feedback Amplifiers Based on The Current Feedback Amplifier Architecture. This Gives The Typical High Slew Rate Benefits of a Cfa Family Along With The Stability And Ease of Use Associated With The Vfa Type Architecture. This Family is Available in Single, Dual, And Triple Versions, With 200MHz, 400MHz, And 700MHz Versions. These Are All Available in Single, Dual And Triple Versions. This Family Operates on Single 5V or 5V Supplies From Minimum Supply Current. The EL5104 And EL5204 Also Feature an Output Enable Function, Which CAN be Used to Put The Output in to a High-impedance Mode. This Enables The Outputs of Multiple Amplifiers to be Tied Together For Use in Multiplexing Applications.<<<>>> <<<>>> <<<>>>Key Features <<<>>> <<<>>> <<<>>>Specified For 5V or 5V Applications <<<>>>Power-down to 17µA <<<>>>-3dB Bandwidth = 700MHz <<<>>> 0.1dB Bandwidth = 45MHz <<<>>>Low Supply Current = 9.5mA <<<>>>Slew Rate = 3000V/µs <<<>>>Low Offset Voltage = 10mV Max <<<>>>Output Current = 160mA <<<>>>AVOL = 1400 <<<>>>Diff Gain/phase = 0.01%/0.02 C
Company: Intersil Corporation
Datasheet: Download EL5204IY-T7 datasheet File size : 498 kB
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Datasheet text preview:
®
EL5104, EL5105, EL5204, EL5205, EL5304
D a ta Sheet May 3, 2004 FN7332
PRELIMINARY
700MHz Slew Enhanced VFA
The EL5104, EL5105, EL5204, EL5205, and EL5304 represent highspeed voltage feedback amplifiers based on the current feedback amplifier architecture. This gives the typical high slew rate benefits of a CFA family along with the stability and ease of use associated with the VFA type architecture. This family is available in single, dual, and triple versions, with 200MHz, 400MHz, and 700MHz versions. These are all available in single, dual and triple versions. This family operates on single 5V or ±5V supplies from minimum supply current. The EL5104 and EL5204 also feature an output enable function, which can be used to put the output in to a high-impedance mode. This enables the outputs of multiple amplifiers to be tied together for use in multiplexing applications.
Features
· Specified for 5V or ±5V applications · Power-down to 17µA · -3dB bandwidth = 700MHz · ±0.1dB bandwidth = 45MHz · Low supply current = 9.5mA · Slew rate = 3000V/µs · Low offset voltage = 10mV max · Output current = 160mA · AVOL = 1400 · Diff gain/phase = 0.01%/0.02°C
Applications
· Video amplifiers · PCMCIA applications · A/D drivers · Line drivers · Por table computers · High speed communications · RGB applications · Broadcast equipment · Active filtering
Ordering Information
PA RT NUMBER EL5104IS EL5104IS-T7 EL5104IS-T13 EL5104I W-T7 EL5104I W-T7A EL5105I C-T 7 E L 5 1 0 5 I C - T 7A EL5105I W-T7 EL5105I W-T7A EL5204I Y EL5204IY-T7 EL5204IY-T13 EL5205IS EL5205IS-T7 EL5205IS-T13 EL5205I Y EL5205IY-T7 EL5205IY-T13 EL5304I U EL5304I U-T 7 E L 5 3 0 4 I U - T 13 PACKAGE 8-Pin SO 8-Pin SO 8-Pin SO 6-Pin SOT-23 6-Pin SOT-23 5-Pin SC-70 5-Pin SC-70 5-Pin SOT-23 5-Pin SOT-23 10-Pin MSOP 10-Pin MSOP 10-Pin MSOP 8-Pin SO 8-Pin SO 8-Pin SO 8-Pin MSOP 8-Pin MSOP 8-Pin MSOP 16-Pin QSOP 16-Pin QSOP 16-Pin QSOP TAPE & REEL 7" 13" 7" (3K pcs) 7" (250 pcs) 7" (3K pcs) 7" (250 pcs) 7" (3K pcs) 7" (250 pcs) 7" 13" 7" 13" 7" 13" 7" 13" PKG. DWG. # MDP0027 MDP0027 MDP0027 MDP0038 MDP0038 P5.049 P5.049 MDP0038 MDP0038 M DP0043 MDP0043 MDP0043 MDP0027 MDP0027 MDP0027 M DP0043 MDP0043 MDP0043 M DP0040 MDP0040 MDP0040
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CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2004. All Rights Reserved. Elantec is a registered trademark of Elantec Semiconductor, Inc. All other trademarks mentioned are the property of their respective owners.
EL5104, EL5105, EL5204, EL5205, EL5304 Pinouts
EL5104 (6-PIN SOT-23) TOP VIEW
OUT 1 VS- 2 IN+ 3 +6 VS+ 5 ENABLE 4 IN-
EL5105 (5-PIN SOT-23, SC-70) TOP VIEW
OUT 1 VS- 2 IN+ 3 +4 IN5 VS+
EL5104 (8-PIN SO) TOP VIEW
NC 1 IN- 2 IN+ 3 VS- 4 + 8 ENABLE 7 VS+ 6 OUT 5 NC
EL5205 (8-PIN SO, MSOP) TOP VIEW
OUTA 1 INA- 2 INA+ 3 VS- 4 + + 8 VS+ 7 OUTB 6 INB5 INB+
EL5204 (10-PIN MSOP) TOP VIEW
INA+ 1 CEA 2 VS- 3 CEB 4 INB+ 5 + + 1 0 INA9 OUTA 8 VS+ 7 OUTB 6 INBINA+ 1 CEA 2 VS- 3 CEB 4 INB+ 5 NC 6 CEC 7 INC+ 8
EL5304 (16-PIN QSOP) TOP VIEW
1 6 INA+ 15 OUTA 14 VS+ + 1 3 OUTB 1 2 INB1 1 NC + 1 0 OUTC 9 INC-
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EL5104, EL5105, EL5204, EL5205, EL5304
Absolute Maximum Ratings (TA = 25°C)
Supply Voltage between VS+ and GND. . . . . . . . . . . . . . . . . . 13.2V Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±VS Differential Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±4V Maximum Output Current. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80mA Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C Ambient Operating Temperature Range . . . . . . . . . .-40°C to +85°C Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . 150°C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA
DC Electrical Specifications
PARAMETER VOS
VS = ±5V, GND = 0V, TA = 25°C, VCM = 0V, VOUT = 0V, VENABLE = GND or OPEN, unless otherwise specified.
DESCRIPTION Offset Voltage
C O N D IT I O N S EL5104, EL5105, EL5204, EL5205 EL5 304
M IN -10 -18
T YP 3 5 10 8 4 50
M AX 10 18
UNIT mV mV µV/°C
TCVOS IB IOS TCIOS PSRR CMRR CMIR RIN CIN IS,ON IS,OFF
Offset Voltage Temperature Coefficient Input Bias Current Input Offset Current Input Bias Current Temperature Coefficient Power Supply Rejection Ratio Common Mode Rejection Ratio Common Mode Input Range Input Resistance Input Capacitance Supply Current - Enabled Supply Current - Shut Down
Measured from TMIN to TMAX VIN = 0V VIN = 0V Measured from TMIN to TMAX 60 VCM from -3V to +3V Guaranteed by CMRR test Common mode SO package 8.5 VS+ VS56 -3 50
30 15
µA µA nA/° C dB dB
70 62 +3 120 1 9. 5 0 17 11 10 70 1 3 .2 65 60
V K pF mA µA µA V dB dB V
PSOR AVOL
Power Supply Operating Range Open Loop Gain RL = 1k to GND RL = 150 to GND
4 55
VOP VON IOUT VIH-EN VIL-EN
Positive Output Voltage Swing Negative Output Voltage Swing Output Current ENABLE pin Voltage for Power Up ENABLE pin Voltage for Shut Down
RL = 150 to 0V RL = 150 to 0V RL = 10 to 0V
3.6
3 .8 - 3 .8 - 3 .6
V mA
±90 (VS+) -2.5
± 160 (VS+) -1.0 0. 5
V V
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EL5104, EL5105, EL5204, EL5205, EL5304
Closed Loop AC Electrical Specifications VS = +5V, GND = 0V, TA = 25°C, VCM = +1.5V, VOUT = +1.5V, VCLAMP = +5V,
VENABLE = +5V, AV = +1, RF = 0, RL = 150 to GND pin, unless otherwise specified. PARAMETER BW SR tR,tF OS tPD tS dG dP eN iN tDIS tEN IEN DESCRIPTION -3dB Bandwidth (VOUT = 200mVP-P) Slew Rate Rise Time, Fall Time Overshoot Propagation Delay 0.1% Settling Time Differential Gain Differential Phase Input Noise Voltage Input Noise Current Disable Time Enable Time Enable Pin Current Enabled, VEN = 0V Disabled, VEN = 5V -1 5 C O N D IT I O N S VS = ±5V, AV = 1, RF = 0 RL = 150, VOUT = -2.5V to +2.5V ±0.1V step ±0.1V step ±0.1V step VS = ±5V, RL = 500, AV = 1, VOUT = ±2.5V AV = 2, RL = 150, VINDC = -1 to +1V AV = 2, RL = 150, VINDC = -1 to +1V f = 10kHz f = 10kHz 2000 M IN T YP 700 3000 0.4 10 0.4 7 0.0 1 0.0 2 10 54 180 650 1 25 5000 M AX UNIT MHz V/µs ns % ns ns % ° nV/Hz pA/Hz ns ns µA µA
Typical Performance Curves
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD JEDEC JESD51-7 HIGH EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
1.2 POWER DISSIPATION (W)
1.4 POWER DISSIPATION (W)
1 1.087W
M
1.2 1.136W 1 1.116W 0.8 0.6 0.4 0.2 0 0 25 50 75 85 100 125 150 SO8 JA=110°C/W
0.8 0.6 0.4 0.2 0 543mW
JA =
SO
11 5
P8
°C
/1
0
/W
J
SO
A =23
T2 3
- 5/6 0° C /W
QSOP16 JA=112°C/W
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 1. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 2. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
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EL5104, EL5105, EL5204, EL5205, EL5304 Typical Performance Curves
JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD 1 607mW 488mW MSOP8/10 JA=206°C/W POWER DISSIPATION (W) 0.8 0.6 0.4 0.2 0 SO8 JA=160°C/W 791mW 781mW QSOP16 JA=158°C/W JEDEC JESD51-3 LOW EFFECTIVE THERMAL CONDUCTIVITY TEST BOARD
0.7 POWER DISSIPATION (W) 0.6 0.5 0.4 0.3 0.2 0.1 0
SOT23-5/6 JA=256°C/W
0
25
50
75 85 100
125
150
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 3. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
FIGURE 4. PACKAGE POWER DISSIPATION vs AMBIENT TEMPERATURE
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems. Intersil Corporation's quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com 5
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