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Part: DG507AC/D
Category:
Communication
-> DSL (Digital Subscriber Line)
-> DSL Analog Front Ends
Description: CMOS Analog Multiplexers
Company: Intersil Corporation
Datasheet: Download DG507AC/D datasheet File size : 201 kB
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Datasheet text preview:
DG506A, DG507A, DG508A, DG509A
D a ta Sheet Nov e m b e r 1999 F i l e Number 3137.3
CMOS Analog Multiplexers
The DG506A, DG507A, DG508A and DG509A are CMOS Monolithic 16-Channel/Dual 8-Channel and 8-Channel/Dual 4-Channel Analog Multiplexers, which can also be used as demultiplexers. An enable input is provided. When the enable input is high, a channel is selected by the address inputs, and when low, all channels are off. A channel in the ON state conducts current equally well in both directions. In the OFF state each channel blocks voltages up to the supply rails. The address inputs and the enable input are TTL and CMOS compatible over the full specified operating temperature range. The DG506A, DG507A, DG508A and DG509A are pinout compatible with the industry standard devices.
Features
· Low Power Consumption · TTL and CMOS-Compatible Address and Enable Inputs · 44V Maximum Power Supply Rating · High Latch-Up Immunity · Break-Before-Make Switching · Alternate Source
Applications
· Data Acquisition Systems · Communication Systems · Signal Multiplexing/Demultiplexing · Audio Signal Multiplexing
Ordering Information
PART NUMBER DG506AAK DG506ACJ DG506ACY DG507ABK DG507ACJ DG507ACY TEMP. RANGE (oC) -55 to 125 0 to 70 0 to 70 -25 to 85 0 to 70 0 to 70 PACKAGE 28 Ld CERDIP 28 Ld PDIP 28 Ld SOIC 28 Ld CERDIP 28 Ld PDIP 28 Ld SOIC PKG. NO. F28.6 E28.6 M28.3 F28.6 E28.6 M28.3 PART NUMBER DG508AAK DG508ABK DG508ACJ DG509ACJ DG509ACY TEMP. RANGE (oC) -55 to 125 -25 to 85 0 to 70 0 to 70 0 to 70 PACKAGE 16 Ld CERDIP 16 Ld CERDIP 16 Ld PDIP 16 Ld PDIP 16 Ld SOIC PKG. NO. F16.3 F16.3 E16.3 E16.3 M16.3
Pinouts
DG506A (PDIP, CERDIP, SOIC) TOP VIEW
V+ 1 NC 2 NC 3 S16 4 S15 5 S14 6 S13 7 S12 8 S11 9 S10 10 S9 11 GND 12 NC 13 A3 14 28 D 27 V26 S8 25 S7 24 S6 23 S5 22 S4 21 S3 20 S2 19 S1 18 EN 17 A0 16 A1 15 A2
DG507A (PDIP, CERDIP, SOIC) TOP VIEW
V+ 1 DB 2 NC 3 S8B 4 S7B 5 S6B 6 S5B 7 S4B 8 S3B 9 S2B 10 S1B 11 GND 12 NC 13 NC 14 28 DA 27 V26 S8A 25 S7A 24 S6A 23 S5A 22 S4A 21 S3A 20 S2A 19 S1A 18 EN 17 A0 16 A1 15 A2
DG508A (PDIP, CERDIP) TOP VIEW
A0 1 16 A1 15 A2 14 GND 13 V+ 12 S5 11 S6 10 S7 9 S8
DG509A (PDIP, SOIC) TOP VIEW
A0 1 EN 2 V- 3 S1A 4 S2A 5 S3A 6 S4A 7 DA 8 16 A1 15 GND 14 V+ 13 S1B 12 S2B 11 S3B 10 S4B 9 DB
EN 2 V- 3 S1 S2 S3 S4 4 5 6 7
D8
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
DG506A, DG507A, DG508A, DG509A Truth Tables
DG506A A3 X 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 A2 X 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 A1 X 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 A0 X 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 EN 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 ON SWITCH None 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 A1 X 0 0 1 1 A0 X 0 1 0 1 DG509A EN 0 1 1 1 1 ON SWITCH None 1A, 1B 2A, 2B 3A, 3B 4A, 4B A2 X 0 0 0 0 1 1 1 1 A1 X 0 0 1 1 0 0 1 1 DG507A A0 X 0 1 0 1 0 1 0 1 EN 0 1 1 1 1 1 1 1 1 ON SWITCH None 1 2 3 4 5 6 7 8
Logic "0" = VAL , VENL 0.8V, Logic "1" = VAH , VENH 2.4V.
Logic "0" = VAL , VENL 0.8V, Logic "1" = VAH , VENH 2.4V.
A0 , A1 , EN Logic "1" = VAH 2.4V, Logic "0" = VAL 0.8V. DG508A A2 X 0 0 0 0 1 1 1 1 A1 X 0 0 1 1 0 0 1 1 A0 X 0 1 0 1 0 1 0 1 EN 0 1 1 1 1 1 1 1 1 ON SWITCH None 1 2 3 4 5 6 7 8
A0 , A1 , A2 , EN Logic "1" = VAH 2.4V, Logic "0" = VAL 0.8V
2
DG506A, DG507A, DG508A, DG509A Functional Diagrams
DG506A
S1 S2 S3 S4 S5 S6 S7 S8 D S9 S10 S11 S12 S13 S14 S15 S16 A0 A1 A2 A3 EN ADDRESS DECODER 1 OF 16 ENABLE 1 OF 4 S1B S2B S3B S4B S5B S6B S7B S8B A0 A1 A2 EN (ENABLE INPUT) DB ADDRESS DECODER 1 OF 8 ENABLE 1 OF 2 S1A S2A S3A S4A S5A S6A S7A S8A DA
DG507A
4 Line Binary Address Inputs (0 0 0 1) and EN = 5V Above example shows channel 2 turned ON. DG508A
S1 S2 S3 S4 S5 S6 S7 S8 A0 A1 A2 EN (ENABLE INPUT) D ADDRESS DECODER 1 OF 8
3 Line Binary Address Inputs (0 0 0) and EN = 5V Above example shows channels 1A and 1B turned ON. DG509A
S1A S2A S3A S4A S1B S2B S3B S4B DB DA
3 Line Binary Address Inputs (1 0 1) and EN = 1 Above example shows channel 6 turned ON.
2 Line Binary Address Inputs (0 0) and EN = 1 Above example shows channels 1A and 1B turned ON.
Schematic Diagram
V+ V+ SX
LOGIC TRIP POINT REF GND LOGIC AX INPUT OR EN VLOGIC INTERFACE AND LEVEL SHIFTER
DECODER +
-
AX
DX
TYPICAL SWITCH
3
DG506A, DG507A, DG508A, DG509A
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V V- to Ground. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V Digital Inputs, VS, VD (Note 1) . . . . . . . . . . . . . .(V- -2V) To (V+ +2V) Continuous Current, (Any Terminal Except S or D) . . . . . . . . . 30mA Continuous Current, (S or D) . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . . . . 40mA
Thermal Information
Thermal Resistance (Typical, Note 2) JA (oC/W) JC (oC/W) 16 Ld CERDIP Package. . . . . . . . . . . . 75 20 28 Ld CERDIP Package. . . . . . . . . . . . 55 18 16 Ld PDIP Package . . . . . . . . . . . . . . 90 N/A 28 Ld PDIP Package . . . . . . . . . . . . . . 55 N/A 16 Ld SOIC Package . . . . . . . . . . . . . . 100 N/A 28 Ld SOIC Package . . . . . . . . . . . . . . 70 N/A Maximum Junction Temperature CERDIP Package. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .175oC PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .150oC Maximum Storage Temperature "A" and "B" Suffix . . . . . . . . . . . . . . . . . . . . . . . . . -65oC to 150oC "C" Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65oC to 125oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . .300oC (SOIC - Lead Tips Only)
Operating Conditions
Temperature Range "A" Suffix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC "B" Suffix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC "C" Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. Signals on SX , DX, EN, or AX exceeding V+ or V- are clamped by internal diodes. Limit diode current to maximum current ratings. 2. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
TA = 25oC, V+ = +15V, V- = -15V, GND = 0V, VEN = 2.4V, Unless Otherwise Specified "A" SUFFIX "B" AND "C" SUFFIX
PARAMETER DYNAMIC CHARACTERISTICS Switching Time of Multiplexer, tTRANSITION Break-Before-Make Interval, tOPEN Enable Turn-ON Time, tON(EN) Enable Turn-OFF Time, tOFF(EN) OFF Isolation, OIRR Source OFF Capacitance, CS(OFF) DG506A, DG507A DG508A, DG509A Drain OFF Capacitance, CD(OFF) DG506A DG507A DG508A DG509A Charge Injection, Q DG506A, DG507A DG508A, DG509A DIGITAL INPUT CHARACTERISTICS Address Input Current, Input Voltage High, IAH Address Input Current Input Voltage Low, IAL VA = 2.4V VA = 15V
TEST CONDITIONS
(NOTE 4) (NOTE 3) (NOTE 4) (NOTE 4) (NOTE 3) (NOTE 4) MIN TYP MAX MIN TYP MAX UNITS µs µs µs µs dB
See Figure 1 See Figure 3 See Figure 2 See Figure 2 VEN = 0V, RL = 1k, CL = 15pF, VS = 7VRMS , f = 500kHz (Note 5) VS = 0V, VEN = 0V, f = 140kHz
-
0.6 0.2 1 0.4 68
1 1.5 1.0 -
-
0.6 0.2 1 0.4 68
-
VD = 0V, VEN = 0V, f = 140kHz See Figure 4 -
6 5
-
-
6 5
-
pF pF
45 23 25 12 6 4
-
-
45 23 25 12 6 4
-
pF pF pF pF pC pC µA µA µA µA
-10 VA = 0V -10 -10
-0.002 0.006 -0.002 -0.002
10 -
-10 -10 -10
-0.002 0.006 -0.002 -0.0002
10 -
VEN = 2.4V VEN = 0V
4
DG506A, DG507A, DG508A, DG509A
Electrical Specifications
TA = 25oC, V+ = +15V, V- = -15V, GND = 0V, VEN = 2.4V, Unless Otherwise Specified (Continued) "A" SUFFIX PARAMETER TEST CONDITIONS "B" AND "C" SUFFIX
(NOTE 4) (NOTE 3) (NOTE 4) (NOTE 4) (NOTE 3) (NOTE 4) MIN TYP MAX MIN TYP MAX UNITS
ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG Drain-Source ON Resistance, rDS(ON) (Note 7) Sequence Each IS = -200µA, VD = +10V Switch ON IS = -200µA, VD = -10V VAL = 0.8V VAH = 2.4V -10V VS +10V r DS(ON)MAX r D S ( O N ) M I N r D S ( O N ) = ----------------------------------------------------------------------rD S ( O N ) A V G VEN = 0V VEN = 0V VS = -10V, VD = +10V VS = +10V, VD = -10V DG507A VS = -10V, VD = +10V VS = +10V, VD = -10V DG508A VS = -10V, VD = +10V VS = +10V, VD = -10V DG509A VS = -10V, VD = +10V VS = +10V, VD = -10V Drain ON Leakage Current, (Note 6) Sequence Each ID(ON) Switch ON DG506A VD = VS(ALL) = +10V VAL = 0.8V VD = VS(ALL) = -10V VAH = 2.4V DG507A VD = VS(ALL) = +10V VD = VS(ALL) = -10V DG508A VD = VS(ALL) = +10V VD = VS(ALL) = -10V DG509A VD = VS(ALL) = +10V VD = VS(ALL) = -10V POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ Negative Supply Current, IPositive Supply Current, I+ Standby Negative Supply Current, I- Standby VEN = 0V, VA = 0V (Standby) VEN = 5.0V, VA = 0V (Enabled) -1.5 -1.5 1.3 -0.7 1.3 -0.7 2.4 2.4 -1.5 -1.5 1.3 -0.7 1.3 -0.7 2.4 2.4 mA mA mA mA -10 -10 -5 -5 -10 -10 0.02 -0.03 0.007 -0.015 0.01 -0.015 0.005 -0.008 10 10 5 5 10 10 -20 -20 -10 -10 -20 -20 0.02 -0.03 0.007 -0.015 0.01 -0.015 0.005 -0.008 20 20 10 10 20 20 nA nA nA nA nA nA nA nA VS = +10V, VD = -10V VS = -10V, VD = +10V -1 -1 0.002 -0.005 1 1 -5 -5 0.002 -0.005 5 5 nA nA -15 270 230 +15 400 400 -15 270 230 +15 450 450 V
rDS(ON) Matching Between Channels
-
6
-
-
6
-
%
Source OFF Leakage Current, IS(OFF) Drain OFF Leakage Current, ID(OFF) DG506A
-10 -10 -5 -5 -10 -10
0.03 -0.06 0.015 -0.03 0.015 -0.03 0.007 -0.015
10 10 5 5 10 10 -
-20 -20 -10 -10 -20 -20
0.03 -0.06 0.015 -0.03 0.015 -0.03 0.007 -0.015
20 20 10 10 20 20 -
nA nA nA nA nA nA nA nA
5
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