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Part: DG507AB
Category:
Communication
-> Network
-> Switches
-> Switches/Multiplexers
Description: CMOS Analog Multiplexers
Company: Intersil Corporation
Datasheet: Download DG507AB datasheet File size : 201 kB
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Datasheet text preview:
DG508A
Da ta S h eet J u ne 2 0 0 1 Fi l e N u m b er 31 37. 4
CMOS Analog Multiplexers itle G 50 , 507 508 509 bt MO naltix) utho ) eyrds terrpoion, inctor, ltixer, x, anl, ched eo) rer ()
The DG508A is a CM OS Monolithic 8-Channel Analog Multiplexer, which can also be used as a demultiplexer. An enable input is provided. When the enable input is high, a channel is selected by the address inputs, and when low, all channels are off. A channel in the ON state conducts current equally well in both directions. In the OFF state each channel blocks voltages up to the supply rails. The address inputs and the enable input are TTL and CMOS compatible over the full specified operating temperature range. The DG508A is pinout com patible with the industry standard devices.
Features
· Low Power Consumption · TTL and CMO S-Compatible Address and Enable Inputs · 44V M axim um Power Supply Rating · High Latch-Up Im munity · Break-Before-M ake Switching · Alternate Source
Applications
· Data Acquisition System s · Comm unication System s · Signal Multiplexing/Demultiplexing · Audio Signal Multiplexing
Ordering Information
PART NUMBER DG508AAK DG508ABK DG508ACJ TEMP. RANGE ( oC) -55 to 125 -2 5 t o 8 5 0 to 70 PACKAGE 16 Ld CE RDIP 16 Ld CERDIP 16 Ld PD IP PKG. NO. F16.3 F16.3 E16.3 A2 X 0 0 0
A0 1 16 A1 15 A2 14 GND 13 V+ 12 S5 11 S6 10 S7 9 S8
Truth Table
DG508A A1 X 0 0 1 1 0 0 1 1 A0 X 0 1 0 1 0 1 0 1 EN 0 1 1 1 1 1 1 1 1 ON SWITCH None 1 2 3 4 5 6 7 8
Pinout
DG508A (PD IP, CE RDIP) TOP VIEW
0 1 1 1 1
EN 2 V- 3 S1 S2 S3 S4 4 5 6 7
D8
A 0 , A1 , A2 , EN Logic "1" = VAH 2.4V, Logic "0" = VAL 0.8V
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc. | Copyright © Intersil Americas Inc. 2001
DG508A Functional Diagram
DG508A
S1 S2 S3 S4 S5 S6 S7 S8 A0 A1 A2 EN (ENABLE INPUT) D ADD RESS DECODER 1 OF 8
3 Line Binar y Address Inputs (1 0 1) and EN = 1 Above example shows channel 6 turned ON.
Schematic Diagram
V+ V+ SX
LOGIC TRIP POINT REF G ND LOGIC A X INPUT OR EN VLOGIC I NTERFACE AND LEVEL SHIFTER
DECODER +
-
AX
DX
TYPICAL SWITCH
2
DG508A
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V V- to Gr ound. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V Digital Inputs, VS, VD (Note 1) . . . . . . . . . . . . . (V- -2V) To ( V+ +2V ) Continuous Current, (Any Terminal Except S or D) . . . . . . . . . 30mA Continuous Current, (S or D) . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . . . . 40mA
Thermal Information
Thermal Resistance (Typical, Note 2) JA ( oC/W) JC (oC/W) 16 Ld CERDIP Package. . . . . . . . . . . . 75 20 16 Ld PDIP Package . . . . . . . . . . . . . . 90 N/A Maximum Junction Temperature CERD IP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC Maximum Storage Temperature "A" and "B" S uffix . . . . . . . . . . . . . . . . . . . . . . . . . - 65oC to 150oC "C" Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 65oC to 125oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range "A" Suffix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC "B" Suffix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC "C" Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
CAUTION: Stresses abo ve those listed in "Absolut e Ma ximum Ratings" may cause perma nent damag e to the device. This is a stress only ra ting and operation of th e device at th ese or any other conditio ns a bove those indicated in the ope ra tiona l sections of this sp ecification is n ot implied.
NOTES: 1. Signals on SX , D , EN, or AX exceeding V+ or V- are clamped by internal diodes. Limit diode current to maximum current ratings. 2. JA is measured w ith the component mounted on an evaluation PC board in free air.
Electrical Specifications
TA = 25oC, V+ = +15V, V- = -15V, GND = 0V, VEN = 2.4V, Unless Otherwise Specified "A" S UFFIX "B" AND "C" SUFFIX
P ARAME TER DYNAMIC C HARACTERISTICS Switching Time of Multiplexer, tTRANSITION Break-Before-Make Interval, tOPEN Enable Turn-ON Time, tON(EN) Enable Turn-OFF Time, tOFF(EN) OFF Isolation, OIRR Source OFF C apacitance, CS(OFF) Drain OFF Capacitance, CD(OFF) Charge Injection, Q
TEST CONDITIONS
(NOTE 4) (NOTE 3) (NOTE 4) (NOTE 4) (NOTE 3) (NOTE 4) MIN TYP M AX MIN TYP M AX UNITS µs µs µs µs dB pF pF pC µA µA µA µA V
See Figure 1 See Figure 3 See Figure 2 See Figure 2 VEN = 0V, RL = 1k , CL = 15pF, VS = 7VRMS , f = 500kHz (Note 5) VS = 0V, VEN = 0V, f = 140kHz VD = 0V, VEN = 0V, f = 140kHz See Figure 4
-
0.6 0.2 1 0.4 68 5 25 4
1 1.5 1.0 -
-
0.6 0.2 1 0.4 68 5 25 4
-
DIGITAL INPUT C HARACTERISTICS Address Input Current, Input Voltage High, IAH VA = 2.4V VA = 15V VA = 0V -1 0 -1 0 -1 0 -0.002 0.006 -0.002 -0.002 10 -1 0 -1 0 -1 0 -0.002 0.006 -0.002 -0.0002 10 -
Address Input Current Input VEN = 2.4V Voltage Low, IAL VEN = 0V ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG Drain-Source ON Resistance, rDS(ON) (Note 7)
-1 5 -
270 230
+15 400 400
-1 5 -
270 230
+15 450 450
Sequence Each IS = -200µA, VD = +10V Switch ON IS = -200µA, VD = -10V VAL = 0.8V, VAH = 2.4V -10V VS +10V r DS(ON)MAX r D S ( O N ) M I N r D S ( O N ) = ----------------------------------------------------------------------rD S ( O N ) A V G
rDS(ON) Matching Between Channels
-
6
-
-
6
-
%
3
DG508A
Electrical Specifications
TA = 25oC, V+ = +15V, V- = -15V, GND = 0V, VEN = 2.4V, Unless Otherwise Specified (Cont inued) "A" S UFFIX P ARAME TER Source OFF Leakage Curr ent, IS(OFF) Drain OFF Leakage Curr ent, ID(OFF) Drain ON Leakage Current, ID(ON) VEN = 0V VEN = 0V TEST CONDITIONS VS = +10V, VD = -10V VS = -10V, VD = +10V VS = -10V, VD = +10V VS = +10V, VD = -10V VD = VS(ALL) = +10V (Note 6) Sequence Each V = V D S(ALL) = -10V Switch ON VAL = 0.8V, VAH = 2.4V "B" AND "C" SUFFIX
(NOTE 4) (NOTE 3) (NOTE 4) (NOTE 4) (NOTE 3) (NOTE 4) MIN TYP M AX MIN TYP M AX UNITS -1 -1 -1 0 -1 0 0.002 -0.005 0.01 -0.015 0.015 -0.03 1 1 10 10 -5 -5 -2 0 -2 0 0.002 -0.005 0.01 -0.015 0.015 -0.03 5 5 20 20 nA nA nA nA nA nA
POWER SUPPLY C HARACTERISTICS Positive Supply Curr ent, I+ VEN = 5.0V (Enabled) or Negative S upply Current, I- VEN = 0V (Standby), VA = 0V -1.5 1.3 -0.7 2.4 - 1.5 1.3 -0.7 2.4 mA mA
Electrical Specifications
TA = Over Operating Temperature Range, V+ = +15V, V- = - 15V, GND = 0V, VEN = 2.4V, Unless Otherw ise Specified "A" SUFFIX
PARAMETER DIGITAL INPUT CHARACTERIS TICS Address Input Current, Input Voltage High, IAH Address Input Current Input Voltage Low, IAL VA = 2.4V VA = 15V VEN = 2.4V VEN = 0V (Note 7)
TEST CONDITIONS
MIN
(NOTE 3) TYP
M AX
UNITS µA µA µA µA V nA nA nA nA nA nA
-3 0 VA = 0V -3 0 -3 0
-
30 -
ANA LOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG Dr ain-Source ON Resistance, rDS(ON) S ource OFF Leakage Current, IS(OFF) Drain OFF Leakage Current, ID(OFF) Drain ON Leakage Current, ID(ON) P OWER SUPPLY CHARACTERISTICS P ositive Supply Current, I+ Negative Supply Current, IP ositive Standby Supply Cur rent, I+ Negative Standby Supply Current, INOTES: 3. Typical values are for design aid only, not guaranteed and not subject to production testing. 4. The algebr aic convention whereby the most negative value is a minimum, and the most positive value is a maximum, is used in this data sheet. 5. Off isolation = 20Log | VS | / | VD |, wher e VS = input to Off switch, and VD = output due to VS . 6. ID(ON) is leakage from driver into "ON" switch. 7. P arameter not tested. Parameter guar anteed by design or characterization. VEN = 0V, VA = 0V VEN = 5.0V, VA = 0V -3.2 -3.2 -3.2 -3.2 4.5 4.5 4.5 4.5 mA mA mA mA -1 5 IS = -200µA, VD = +10V IS = -200µA, VD = -10V VS = +10V , VD = -10V VS = -10V, VD = +10V VEN = 0V VS = -10V, VD = +10V VS = +10V , VD = -10V (Note 6) Sequence E ach Switch ON VD = VS(ALL) = +10V VAL = 0.8V, VAH = 2.4V VD = VS(ALL) = -10V -5 0 -200 -200 +15 500 500 50 200 200 -
Sequence Each Switch ON VAL = 0.8V, VAH = 2.4V VEN = 0V
4
DG508A Test Circuits and Waveforms
+2.4 V +15V V+ EN DG508A S1 +1 0V LOGIC INPUT 3V 5 0% 0 VS1 S1 ON 0.8 VS1 SWITCH OUTPUT VO SWITCH OUTPUT VO 1M -15V 35pF TRANSITION TIME tr < 20ns tf < 20ns
S 2 T HRU S 7 A2 A1 LOGIC INPUT 50 A0 GND S8 -10V
0
D V-
0.8 VS8 VS8 S8 ON TRANSITION TIME
FIGURE 1A. TEST CIRCUIT FIGURE 1. SWITCHING TIME
+15V V+ EN DG508A S2 THRU S8 A2 A1 A0 EN 50 G ND V-15V D 1 k SWITCH OUTPUT VO 35pF SWI TCH OUTPUT VO S1 -5V EN
FIGUR E 1B. MEA SUREMENT POINTS
3V 50 % 0V tON (EN) 0V
tr < 20 ns tf < 20ns 50 % tOFF (EN)
0.1VO
VO
0.9VO
FIGURE 2A. TEST CIRCUIT FIGURE 2. ENABLE TIMES
+2.4V V+ EN S1 THRU S8 DG508A +5 V (VS) LOGIC INPUT +15 V
FIGUR E 2B. MEA SUREMENT POINTS
3V
tr < 20 ns tf < 20ns
A0 A1
0V
VS A2 D GND 50 -15V V1k 35pF SWITCH OUTPUT VO SWITCH OUTPUT VO 0V tOPEN 50% 50%
LOGIC INPUT
FIGURE 3A. TEST CIRCUIT
FIGUR E 3B. MEA SUREMENT POINTS
FIGUR E 3. BR EAK-BEFORE-MAKE IN TERVAL
5
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