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Part: DG413
Category:
Analog & Mixed-Signal Processing
-> Switches & Multiplexers
-> Analog Switches
-> SPST
Description: Monolithic Quad Spst, CMOS Analog Switches
Company: Intersil Corporation
Datasheet: Download DG413 datasheet File size : 304 kB
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®
DG411, DG412, DG413
Da ta Sheet A pr i l 2002 FN 3 2 82 . 6
Monolithic Quad SPST, CMOS Analog Switches
The DG411 series monolithic CMOS analog switches are drop-in replacements for the popular DG211 and DG212 series devices. They include four independent single pole throw (SPST) analog switches, and TTL and CMOS compatible digital inputs. These switches feature lower analog ON resistance (<35) and faster switch time (tON < 175ns) compared to the DG211 or DG212. Charge injection has been reduced, simplifying sample and hold applications. The improvements in the DG411 series are made possible by using a high voltage silicon-gate process. An epitaxial layer prevents the latch-up associated with older CMOS technologies. The 44V maximum voltage range permits controlling 40VP-P signals. Power supplies may be single-ended from +5V to +34V, or split from ±5V to ±20V. The four switches are bilateral, equally matched for AC or bidirectional signals. The ON resistance variation with analog signals is quite low over a ±15V analog input range. The switches in the DG411 and DG412 are identical, differing only in the polarity of the selection logic. Two of the switches in the DG413 (#1 and #4) use the logic of the DG211 and DG411 (i.e., a logic "0" turns the switch ON) and the other two switches use DG212 and DG412 positive logic. This permits independent control of turn-on and turn-off times for SPDT configurations, permitting "break-beforemake" or "make-before-break" operation with a minimum of external logic.
TRUTH TABLE DG 411 LOGIC 0 1 DG 412 SWITCH 1, 4 OFF ON DG 413 SWITCH 2, 3 ON OFF
Features
· ON Resistance (Max) . . . . . . . . . . . . . . . . . . . . . . . . . 35 · Low Power Consumption (PD) . . . . . . . . . . . . . . . . . . <35µW · Fast Switching Action - tON (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175ns - tOFF (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 145ns · Low Charge Injection · Upgrade from DG211/DG212 · TTL, CMOS Compatible · Single or Split Supply Operation
Applications
· Audio Switching · Battery Operated Systems · Data Acquisition · Hi-Rel Systems · Sample and Hold Circuits · Communication Systems · Automatic Test Equipment
Pinout
DG411, DG412, DG413 (PDIP, SOIC) TOP VIEW
IN1 1 D1 2 S1 3 V- 4 G ND 5 S4 6 D4 7 IN4 8 16 IN2 15 D2 14 S2 13 V+ 12 VL 11 S3 10 D3 9 IN3
SWITCH SWITCH ON OFF OFF ON
NOTE: Logic "0" 0.8V. Logic "1" 2.4V.
Ordering Information
P ART NUMBER DG411DJ DG411DY DG412DJ DG412DY DG413DJ DG413DY TEMP. RANGE (oC) -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 -40 to 85 PACKAGE 16 Ld PDIP 16 Ld SOIC 16 Ld PDIP 16 Ld SOIC 16 Ld PDIP 16 Ld SOIC PKG. NO. E 16. 3 M 16. 15 E 16. 3 M 16. 15 E 16. 3 M 16. 15
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil (and design) is a registered trademark of Intersil Americas Inc. Copyright © Intersil Americas Inc. 2002. All Rights Reserved
DG411, DG412, DG413 Functional Diagrams
IN1 D1 S2 IN2 D2 S3 IN3 D3 S4 IN4 D4 IN4 D4 IN3 D3 S4 IN4 D4 IN2 D2 S3 IN3 D3 S4
Four SPST Switches per Package Switches Shown for Logic "1" Input
DG411 S1 IN1 D1 S2 IN2 D2 S3 DG412 S1 IN1 D1 S2 DG413 S1
Schematic Diagram
V+
(1 Channel)
S
VVL
V+ INX D
GND V-
Pin Descriptions
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 SYMBOL IN1 D1 S1 VG ND S4 D4 IN4 IN3 D3 S3 VL V+ S2 D2 IN2 DESCRIPTION Logic Control for Switch 1. Drain (Output) Terminal for Switch 1. Source (Input) Terminal for Switch 1. Negative Power Supply Terminal. Ground Terminal (Logic Common). Source (Input) Terminal for Switch 4. Drain (Output) Terminal for Switch 4. Logic Control for Switch 4. Logic Control for Switch 3. Drain (Output) Terminal for Switch 3. Source (Input) Terminal for Switch 3. Logic Reference Voltage. Positive Power Supply Terminal (Substrate). Source (Input) Terminal for Switch 2. Drain (Output) Terminal for Switch 2. Logic Control for Switch 2.
2
DG411, DG412, DG413
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V GND to V-. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25V VL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . (GND -0.3V) to (V+) +0.3V Digital Inputs, VS , VD (Note 1). . . . . (V-) -2V to (V+) + 2V or 30mA, Whichever Occurs First Continuous Current (Any Terminal) . . . . . . . . . . . . . . . . . . . . . 30mA Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . 100mA
Thermal Information
Thermal Resistance (Typical, Note 2) JA (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90 SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 110 Maximum Junction Temperature (Plastic Packages). . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)
Operating Conditions
Voltage Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20V (Max) Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . . -40oC to 85oC Input Low Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.8V (Max) Input High Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.4V (Min) Input Rise and Fall Time . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20ns
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTES: 1. Signals on SX , DX , or INX exceeding V+ or V- will be clamped by internal diodes. Limit forward diode current to maximum current ratings. 2. JA is measured with the component mounted on a low effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
Electrical Specifications
Test Conditions: V+ = +15V, V- = -15V, VL = 5V, VIN = 2.4V, 0.8V (Note 3), Unless Otherwise Specified TEST CONDITIONS TEMP (o C ) (NOTE 4) (NOTE 5) (NOTE 4) MIN TYP M AX UNITS
PARAMETER DYNAMIC CHARACTERISTICS Turn-ON Time, tON
RL = 300, CL = 35pF, VS = ±10V (Figure 1)
25 85
-
110 100 25 5 68 -8 5 9 9 35
175 220 145 160 -
ns ns ns ns ns pC dB dB pF pF pF
Turn-OFF Time, tOFF
25 85
Break-Before-Make Time Delay Charge Injection, Q (Figure 3) OFF Isolation (Figure 5) Crosstalk (Channel-to-Channel), (Figure 4) Source OFF Capacitance, CS(OFF) Drain OFF Capacitance, CD(OFF) Channel ON Capacitance, CD(ON) + CS(ON) DIGITAL INPUT CHARACTERISTICS Input Current VIN Low, IIL Input Current VIN High, IIH
DG413 Only, RL = 300, CL = 35pF (Figure 2) CL = 10nF, VG = 0V, RG = 0 RL = 50, CL = 5pF, f = 1MHz
25 25 25 25
f = 1MHz (Figure 6)
25 25 25
VIN Under Test = 0.8V, All Others = 2.4V VIN Under Test = 2.4V, All Others = 0.8V
Full Full
-0. 5 -0. 5
0.005 0.005
0. 5 0. 5
µA µA
ANALOG SWITCH CHARACTERISTICS ± ± Analog Signal Range, VANALOG Drain-Source ON Resistance, rDS(ON) IS = IS = 10mA 10mA, VD = ±8.5V, V+ = 13.5V, V- = -13.5V Full 25 Full -1 5 25 15 35 45 V
3
DG411, DG412, DG413
Electrical Specifications
Test Conditions: V+ = +15V, V- = -15V, VL = 5V, VIN = 2.4V, 0.8V (Note 3), Unless Otherwise Specified (Continued) TEST CONDITIONS ± V+ = 16.5V, V- = -16.5V, VD = ±15.5V, VS = 15.5V TEMP (o C ) 25 Full 25 Full V+ = 16.5V, V- = -16.5V, VS = VD = ±15.5V 25 Full (NOTE 4) (NOTE 5) (NOTE 4) MIN TYP M AX -0.25 -5 -0.25 -5 -0. 4 -1 0 ±0.1 ±0.1 ±0.1 0. 25 +5 0. 25 +5 0. 4 + 10 UNITS nA nA nA nA nA nA
PARAMETER Source OFF Leakage Current, IS(OFF) Drain OFF Leakage Current, ID(OFF) Channel ON Leakage Current, ID(ON) + IS(ON)
POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ V+ = 16.5V, V- = -16.5V, VIN = 0V or 5V 25 85 Negative Supply Current, I25 85 Logic Supply Current, IL 25 85 Ground Current, IGND 25 85 -1 -5 -1 -5 0. 0001 -0. 0001 0. 0001 -0. 0001 1 5 1 5 µA µA µA µA µA µA µA µA
Electrical Specifications
(Single Supply) Test Conditions: V+ = +12V, V- = 0V, VL = 5V, VIN = 2.4V, 0.8V (Note 3), Unless Otherwise Specified TEST CONDITIONS T E MP (oC) (NOTE 4) MI N (NOTE 5) TYP (NOTE 4) MAX UNITS
PARAMETER DYNAMIC CHARACTERISTICS Turn-ON Time, tON
RL = 300, CL = 35pF, VS = 8V, (Figure 1)
25 85 25 85
-
175 95 25 25
250 315 125 140 -
ns ns ns ns ns pC
Turn-OFF Time, tOFF
Break-Before-Make Time Delay Charge Injection, Q
DG413 Only, RL = 300, CL = 35pF, VS = 8V CL = 10nF, VG = 6.0V, RG = 0
25 25
ANALOG SWITCH CHARACTERISTICS Analog Signal Range, VANALOG Drain-Source ON Resistance, rDS(ON) IS = -10mA, VD = 3V, 8V V+ = 10.8V F ull 25 F ull 0 40 12 80 100 V
4
DG411, DG412, DG413
Electrical Specifications
(Single Supply) Test Conditions: V+ = +12V, V- = 0V, VL = 5V, VIN = 2.4V, 0.8V (Note 3), Unless Otherwise Specified (Continued) TEST CONDITIONS T E MP (oC) (NOTE 4) MI N (NOTE 5) TYP (NOTE 4) MAX UNITS
PARAMETER POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+
V+ = 13.2V, V- = 0V VIN = 0V or 5V
25 85 25 85
-
0. 0001 -
1 5 1 5 -
µA µA µA µA µA µA µA µA
Negative Supply Current, I-
-1 -5 -1 -5
-0. 0001 0. 0001 -0. 0001 -
Logic Supply Current, IL
25 85
Ground Current, IGND
25 85
NOTES: 3. VIN = input voltage to perform proper function. 4. The algebraic convention whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet. 5. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
Test Circuits and Waveforms
VO is the steady state output with the switch on. Feedthrough via switch capacitance may result in spikes at the leading and trailing edge of the output waveform.
3V LOGIC INPUT 50% 0V tOFF SWITCH INPUT VS VO SWITCH OUT P UT 0V tON 90% 90% tr < 20ns tf < 20ns SWITCH INPUT S1 IN1 LOGIC INPUT RL GND V-15V CL +5 V VL V+ D1 +15V SWITCH OUT P UT VO
NOTE: Logic input waveform is inverted for switches that have the opposite logic sense. FIGURE 1A. MEASUREMENTS POINTS
Repeat test for all IN and S. For load conditions, see Specifications. CL includes fixture and stray RL capacitance. V O = V S ----------------------------------RL + rD S ( O N ) FIGURE 1B. TEST CIRCUIT
FIGURE 1. SWITCHING TIMES
3V LOGIC INPUT SWITCH OUT P UT (V01) 0V VS1 90% 0V VS2 90% 0V tD tD VS2 = 10V S1 S2 VL VS1 = 10V +5 V V+ +15V D1 D2 RL 2 300 VO 2 RL 1 300 VO1 CL 1 35pF
IN1 , IN2 LOGIC INPUT GND
CL 2 35pF
SWITCH OUT P UT VO 2
V-15V
CL includes fixture and stray capacitance.
FIGURE 2A. MEASUREMENT POINTS FIGURE 2. BREAK-BEFORE-MAKE TIME
FIGURE 2B. TEST CIRCUITS
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