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Part: DG201AA
Category:
Communication
-> Network
-> Switches
-> Switches/Multiplexers
Description: Quad Spst, CMOS Analog Switches
Company: Intersil Corporation
Datasheet: Download DG201AA datasheet File size : 184 kB
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Datasheet text preview:
CT UCT OD U E PR E PROD IP), ET D OL UT OBS UBSTIT DG441(P42 S ), ), DG4 E R DIP C D a t a S h e e t SIBL POS 0201(CE HS(SOI HI1- I9P0201 H
DG 201A , DG 202
M ay 200 1 Fi l e N um be r 3 117. 3
Quad SPST, CMOS Analog Switches itle G 20 , 202 bt uad ST, OS aitch utho ) eyrds terrpoion, inctor, itch OS PST, DT, ST, DT, eo, ET, alog itch, anl) reThe DG201A and DG202 quad SPST analog switches are designed using Intersil's 44V CMO S process. These bidirectional switches are latch-proof and feature breakbefore-m ake switching. Designed to block signals up to 30V P-P in the OFF state, the DG201A and DG202 offer the advantages of low ON resistance (175), wide input signal range (±15V) and provide both TTL and CM OS compatibility. The DG201A and DG202 are specification and pinout compatible with the industry standard devices.
Features
· Input Signal R ange. . . . . . . . . . . . . . . . . . . . . . . . . . ±15V · Low rDS(ON) (Max) . . . . . . . . . . . . . . . . . . . . . . . . . . 175 · TTL, CMOS C om patible · Latch-Up Proof · True Second Source · M axim um Supply Ratings . . . . . . . . . . . . . . . . . . . . . 44V · Logic Inputs Accept Negative Voltages
Part Number Information
PART NUMBER DG201AAK DG201ABK DG201ACJ DG201ACY DG202AK DG202CJ TEMP. RANGE ( oC) -55 to 125 -2 5 t o 8 5 0 to 70 0 to 70 -55 to 125 0 to 70 PACKAGE 16 Ld CE RDIP 16 Ld CE RDIP 16 Ld PDIP 16 Ld SOIC 16 Ld CE RDIP 16 Ld P DIP PKG. NO. F16.3 F16.3 E16.3 M16.3 F16.3 E16.3
Functional Block Diagrams
DG201A
S1 IN1 D1 S2 IN2 D2 S3 IN3 D3 S4
Pinout
DG201A , DG202 (CERDIP, PDIP, SOIC ) TOP VIEW
1 2 3 16 IN 2 15 D2 14 S2 13 V+ (SUBSTRATE) 12 NC 11 S3 10 D3 9 IN 3
IN4 D4
DG202
S1 IN1 D1 S2 IN2 D2 S3 IN3 D3 S4 IN4 D4
I N1 D1 S1
V- 4 G ND S4 D4 I N4 5 6 7 8
SWITCHES SHOWN FOR LOGIC "1" INPUT
TRUTH TABLE LOGIC 0 1 DG201A ON OFF DG202 OFF ON
Logic "0" 0.8V, Logic "1" 2.4V
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc. | Copyright © Intersil Americas Inc. 2001
DG201A, DG202
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44V V- to Gr ound. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . - 25V VIN to Ground (Note 1) . . . . . . . . . . . . . . . . . . . (V-) -2V to ( V+) +2V VS or VD to V+ (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . +2 to (V-) -2V VS or VD to V- (Note 1) . . . . . . . . . . . . . . . . . . . . . . . -2 to ( V+) +2V Curr ent, any Terminal Except S or D . . . . . . . . . . . . . . . . . . . . 30mA Continuous Current, S or D . . . . . . . . . . . . . . . . . . . . . . . . . . . 20mA Peak Current, S or D (Pulsed 1ms, 10% Duty Cycle Max) . . . . . 70mA
Thermal Information
Thermal Resistance (Typical, Note 2) JA ( oC/W) JC (oC/W) CERD IP Package . . . . . . . . . . . . . . . . . 75 20 PDIP Package . . . . . . . . . . . . . . . . . . . 100 N/A SOIC Package . . . . . . . . . . . . . . . . . . . 100 N/A Maximum Junction Temperature Ceramic P ackage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . - 65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC (SOIC - Lead Tips Only)
Operating Conditions
Temperature Range "A" Suffix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC "B" Suffix. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25oC to 85oC "C" Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
CAUTION: Stresses abo ve those listed in "Absolut e Ma ximum Ratings" may cause perma nent damag e to the device. This is a stress only ra ting and operation of th e device at th ese or any other conditio ns a bove those indicated in the ope ra tiona l sections of this sp ecification is n ot implied.
NOTES: 1. Signals on VS , VD , or VIN exceeding V+ or V- will be clamped by internal diodes. Limit for ward diode current to maximum current ratings. 2. JA is measured w ith the component mounted on an evaluation PC board in free air. Electrical Specifications V+ = 15V, V- = -15V, GND = 0V, TA = 25oC "A" S UFFIX PA RAME TER DY NAMIC CHARACTERISTICS Turn-ON Time, tON Turn-OFF Time, tOFF Charge Injection, Q OFF Isolation, OIRR Crosstalk (Channel to Channel), CCRR Source OFF Capacitance, CS(OFF) Drain OFF Capacitance, CD(OFF) Channel ON Capacitance, C D(ON) + CS(ON) DIGITAL INPUT CHARACTERISTICS Input Current with Voltage High, IIH VIN = 2.4V VIN = 15V Input Current with V oltage Low, IIL ANALOG SWITCH CHARACTER ISTICS Analog Signal Range, VANALOG Drain-Source ON Resistance, r DS(ON) Source OFF Leakage Current, IS(OFF) VD = ±10V , VIN = 0.8V (DG201A) IS = 1mA, VIN = 2.4V ( DG202) VIN = 2.4V (DG201A) VIN = 0.8V (DG202) VS = 14V, VD = -14V VS = - 14V, VD = 14V VS = - 14V, VD = 14V V S = 14V, VD = -14V - 15 -1.0 -1.0 115 0.01 -0.02 0.01 -0.02 15 175 1.0 1.0 -15 -5.0 -5.0 115 0.01 -0.02 0.01 -0.02 15 200 5.0 5.0 V nA nA nA nA VIN = 0V -1.0 -1.0 -0.0004 0.003 -0.0004 1.0 -1.0 -1.0 -0.0004 0.003 -0.0004 1.0 µA µA µA See Figure 1 See Figure 1 C L = 1nF, RS = 0, VS = 0V VIN = 5V, RL = 75, VS = 2.0V, f = 100kHz f = 140kHz, VIN = 5V, VS = VD = 0V 480 370 20 70 -9 0 5.0 5.0 16 600 450 480 370 20 70 -9 0 5.0 5.0 16 ns ns pC dB dB pF pF pF TEST CONDITIONS MIN (NOTE 3) TYP M AX "B" AND "C " S UFFIX MIN (NOTE 3) TY P M AX UNITS
Drain OFF Leakage Current, ID(OFF)
2
DG201A, DG202
Electrical Specifications V+ = 15V, V- = -15V, GND = 0V, TA = 25oC ( Continued) "A" S UFFIX PA RAME TER Drain ON Leakage Current, ID(ON) (Note 5) TEST CONDITIONS VIN = 0.8V (DG201A) VIN = 2.4V (DG202) VD = VS = 14V VD = VS = -14V MIN -1.0 (NOTE 3) TYP 0.1 -0.15 M AX 1.0 "B" AND "C " S UFFIX MIN -5.0 (NOTE 3) TY P 0.1 -0.15 M AX 5.0 UNITS µA µA
POWER SUPPLY CHARACTERISTICS Positive Supply Current, I+ Negative Supply Current, IAll Channels ON or OFF -1 0.9 -0.3 2 -1 0.9 -0.3 2 mA mA
Electrical Specifications
V+ = 15V, V- = -15V, GND = 0V, TA Over Oper ating Temperatur e Range "A" SUFFIX (NOTE 3) TYP
P ARAMETER DIGITAL INPUT CHARACTERISTICS Input Current with Voltage High, IIH VIN = 2.4V VIN = 15V Input Current with V oltage Low, IIL ANALOG SWITCH CHARACTER ISTICS Analog Signal Range, VANALOG Drain-Source ON Resistance, r DS(ON) Source OFF Leakage Current, IS(OFF) VIN = 0V
TEST CONDITIONS
MIN
M AX
UNITS
-1 0 -1 0
-
10 -
µA µA µA
-1 5 VD = ±10V, VIN = 0.8V (DG201A) IS = 1mA, VIN = 2.4V (DG202) VIN = 2.4V ( DG201A) VIN = 0.8V ( DG202) VS = 14V, VD = -14V VS = -14V, VD = 14V VS = -14V, VD = 14V VS = 14V, VD = -14V -
-
15 250
V nA nA nA nA µA µA
-100 -100 -200
-
100 100 200 -
Drain OFF Leakage Current, ID(OFF)
Drain ON Leakage Current, ID(ON) (Note 5)
VIN = 0.8V ( DG201A) VIN = 2.4V ( DG202)
VD = VS = 14V VD = VS = -14V
NOTES: 3. Typical values are for design aid only, not guaranteed and not subject to production testing. 4. The algebraic convention whereby the most negative value is a minimum, and the most positive is a maximum, is used in this data sheet. 5. ID(ON) is leakage from driver into ON switch.
3
DG201A, DG202 Test Circuits and Waveforms
LOGIC 3V INPUT tr < 20 ns tf < 20ns SWITCH INPUT LOGIC "0 " = SWITCH ON 50% VO = VS RL RL + rDS(ON) 15 V V+ SWITCH INPUT VS = 2V VS 90% SWITCH OUTPUT 90% LOGIC INPUT IN1 RL 1 k S1 D1 SWITCH OUTPUT VO CL 3 5pF
tO N
tOFF
GND V-15V
(REPEAT TEST FOR IN2 , IN 3 AND IN 4)
Logic shown for DG201A, invert for DG202.
FIGURE 1. tON AND tOFF SWITCHING TES T CIRCUIT AND MEASURE ME NT POINTS
VO RS SX DX VO SWITCH OUTPUT
VS
INX
CL = 1nF INX ON OFF ON
NOTES: 6. VO = Measured voltage error due to charge injection. 7. The err or in coulombs is Q = CL x VO . FIGURE 2. CHARGE INJECTION TEST CIRCU IT AN D MEASUREMENT POIN TS
+15V C C
+15V
SIGNAL GENERATOR VS
V+ VS
SIGNAL GENERATOR VS INX VIN ANALYZER CHAN A 0V, 2.4V
3
V+ VS1
VD1
50
IN1
IN2
0V, 2. 4V
ANALYZER CHAN A CHAN B RL -15 V VD G ND VC
CHAN B RL
VD2 GND
VS2 VC -15 V
NC
C = 0.001µ F || 0.1µF Chip Capacitors
V S O I R R = 20 Log ------VD
C = 0.001µ F || 0.1µF Chip Capacitors
V S1 C C R R = 20 Log ----------VD 2
FIGURE 3. OFF ISOLATION TEST CIRCUIT
FIGURE 4. CHANNEL TO CHANNEL CROSSTALK TEST CIRCUIT
4
DG201A, DG202 Dual-In-Line Plastic Packages (PDIP)
N E1 INDE X AREA 12 3 N/2 - B- AD BASE PLANE SEATI NG PLANE D1 B1 B D1 A1 A2 L A C L E
E16.3 (JEDEC MS-001-BB ISSUE D) 16 LE AD DUAL-IN-LINE PLASTIC PACKAGE
INCHE S SYMBOL A A1 MIN 0.015 0.115 0.014 0.045 0.008 0.735 0.005 0.300 0.240 M AX 0.210 0.195 0.022 0.070 0.014 0.775 0.325 0.280 MILLIME TERS MIN 0.39 2.93 0.356 1.15 0.204 18.66 0.13 7.62 6.10 M AX 5.33 4.95 0.558 1.77 0.355 19.68 8.25 7.11 NOTE S 4 4 8, 10 5 5 6 5 6 7 4 9 Rev. 0 12/93
-C-
A2 B B1 C D D1 E E1 e eA eB L N
eA eC
C
e
0.01 0 (0.25) M C A B S
eB
NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metr ic dimensions, the inch dimensions control. 2. Dimensioning and tolerancing per ANSI Y14.5M-1982. 3. S ymbols are defined in the " MO Series Symbol List" in S ection 2.2 of Publication No. 95. 4. Dimensions A, A1 and L ar e measured w ith the package seated in JEDEC seating plane gauge GS-3. 5. D, D1, and E1 dimensions do not include mold flash or protrusions. Mold flash or pr otrusions shall not exceed 0.010 inch (0.25mm). 6. E and eA are measured with the leads constrained to be perpendicular to datum -C- . 7. eB and eC ar e measured at the lead tips with the leads unconstrained. eC must be zero or greater . 8. B1 maximum dimensions do not include dambar protrusions. Dambar pr otrusions shall not exceed 0.010 inch (0.25mm). 9. N is the maximum number of terminal positions. 10. Corner leads (1, N , N/2 and N/2 + 1) for E8.3, E16.3, E 18.3, E 28.3, E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
0.100 BSC 0.300 BSC 0.115 16 0.430 0.150 -
2.54 BS C 7.62 BS C 10.92 3.81 16
2.93
5
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