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Part: DG201
Category:
Analog & Mixed-Signal Processing
-> Switches & Multiplexers
-> Analog Switches
-> SPST
Description: CMOS Quad SPST Analog Switch
Company: Intersil Corporation
Datasheet: Download DG201 datasheet File size : 184 kB
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Datasheet text preview:
P
UC T UCT D R OD TE P TE PRO E SOL STITU 4 OB S UB G44D a t a S h e e t IBLE G441, D D OS S
DG 201
M ay 200 1 Fi l e N um be r 3 115. 5
CMOS Quad SPST Analog Switch itle G 20 bt MO uad ST aitch utho ) eyrds terrpoion, inctor, itch OS PST, DT, ST, DT, eo, ET, alog itch, anl) rer () OCI
The DG201 solid state analog switch is designed using an improved, high voltage CM OS monolithic technology. It provides ease-of-use and performance advantages not previously available from solid state switches. Destructive latch-up of solid state analog gates have been eliminated by Intersil's CMOS technology. The DG201 is completely specification and pinout compatible with the industry standard devices.
Features
· Switches G reater than 28VP-P Signals with ±15V Supplies · Break-Before-M ake Switching - tOFF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 250ns - tON . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 700ns · TTL, DTL, CM OS, PM OS Compatible · Non-Latching with Supply Turn-O ff · Complete Monolithic Construction · Industry Standard (DG 201)
Part Number Information
PAR T NUMBER DG201CJ TEMP. RANGE ( oC) 0 to 70 PACKAGE 16 Ld PD IP PKG. NO. E16.3
Applications
· Data Acquisition · Sample and Hold Circuits
Functional Diagram
S
· Operational Amplifier Gain Switching Networks
Pinout
D G201 (P DIP) TOP VIE W
I N1 1 16 IN2 15 D2 14 S2 13 V+(SU BSTRATE) 12 VREF 11 S3 10 D3 9 IN3
IN
N
P
D
D1 2 S1 3 V- 4
DG201 SWITCH CELL
G ND 5 S4 6 D4 7
TRUTH TABLE LOGIC 0 1 DG201 ON OFF
I N4 8
SWITCHES SHOWN FOR LOGIC "1" INPUT
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. 1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Americas Inc. | Copyright © Intersil Americas Inc. 2001
DG201 Functional Diagram
(1/4 DG201)
V+ V-
Q3
Q7 Q5 Q14
Q8 Q1 VREF
Q15 V+ Q10 Q12 Q13
Q2 GATE PROTECTION RESISTOR Q4 Q6
Q9 S1 Q11 D1
INPU T
V-
Pin Descriptions
PIN 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 SYMBOL IN1 D1 S1 VG ND S4 D4 IN4 IN3 D3 S3 VREF V+ S2 D2 IN2 DESCR IPTION Logic Control for Switch 1 Drain (Output) Ter minal for Switch 1 Source (Input) Terminal for Switch 1 Negative Power Supply Terminal Ground Terminal ( Logic C ommon) Source (Input) Terminal for Switch 4 Drain (Output) Ter minal for Switch 4 Logic Control for Switch 4 Logic Control for Switch 3 Drain (Output) Ter minal for Switch 3 Source (Input) Terminal for Switch 3 Logic Reference Voltage Positive Power Supply Terminal (Substrate) Source (Input) Terminal for Switch 2 Drain (Output) Ter minal for Switch 2 Logic Control for Switch 2
2
DG201
Absolute Maximum Ratings
V+ to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36V V+ to VD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V VD to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V VD to VS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28V VREF to V- . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33V VREF to VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30V VREF to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V VIN to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20V Curr ent (Any Terminal) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30mA
Thermal Information
Thermal Resistance (Typical, Note 1) JA ( oC/W) JC (oC/W) PDIP Package . . . . . . . . . . . . . . . . . . . 90 N/A Maximum Junction Temperature Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . - 65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Range "C" Suffix . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 70oC
CAUTION: Stresses abo ve those listed in "Absolut e Ma ximum Ratings" may cause perma nent damag e to the device. This is a stress only ra ting and operation of th e device at th ese or any other conditio ns a bove those indicated in the ope ra tiona l sections of this sp ecification is n ot implied.
NOTE: 1. JA is measured w ith the component mounted on an evaluation PC board in free air.
Electrical Specifications
TA = 25oC, V+ = +15V, V- = - 15V "C" SUFFIX
PARAMETER DY NAMIC CHARACTERISTICS Turn-ON Time (N ote 3), tON Turn-OFF Time (Note 3), tOFF Charge Injection, Q Off Isolation Rejection Ratio, OIRR Crosstalk (Channel-to-Channel), CCRR DIGITAL INPUT CHARACTERISTICS Input Logic Current, IIN(ON) Input Logic Current, IN(OFF) ANALOG SWITCH CHARACTER ISTICS Analog Signal Range, VANALOG Drain-Source ON Resistance, r DS(ON) Channel-to-Channel r DS(ON) Match, r DS(ON) Drain OFF Leakage Current, ID(OFF) Source OFF Leakage Current, IS(OFF) Channel ON Leakage Current, ID(ON) + IS(ON) POWER SUPPLY CHARACTERISTICS Supply Current, I+ Positive Supply Current, I- Negative NOTES:
TEST CONDITION S
0oC
(NO T E 2 ) 25oC
70oC
UNITS
RL = 1k , VANALOG = -10V to +10V (Figure 1) RL = 1k , VANALOG = -10V to +10V (Figure 1) Figure 2 f = 1MHz, R L = 100 , CL 5pF, (Figure 3) One Channel Off
-
1.0 0.5 20 (Typ) 50 (Typ) -50 (Typ)
-
µs µs mV dB dB
VIN = 0.8V (Note 3) VIN = 2.4V (Note 3)
±1 ±1
±1 ±1
± 10 ± 10
µA µA
IS = 10mA, VANALOG = ±10V 100 VANALOG = -14V to +14V VANALOG = -14V to +14V VD = VS = -14V to +14V -
±15 (Typ) 100 30 (Typ) ±5 ±5 ±5
125 100 100 200
V nA nA nA
VIN = 0V or VIN = 5V
2000 2000
1000 1000
2000 2000
µA µA
2. Typical values are for design aid only, not guaranteed and not subject to production testing. 3. All channels are turned off by high "1" logic inputs and all channels are turned on by low "0" inputs; however 0.8V to 2.4V describes the minimum range for switching properly. P eak input curr ent required for transition is typically -120µA.
3
DG201 Test Circuits
ANALOG INPUT 10V 3V 0V LOGIC I NPUT 10pF VOUT 1k 3V 0V LOGIC INPUT 10 nF VOUT ANALOG INPUT 10 V
FIGURE 1. t ON AND tOFF TEST CIRCUIT
FIGURE 2. CHARGE INJECTION TEST CIRCUIT
ANA LOG INPUT LOGIC INPUT 3V V O UT 100 2VP-P AT 1MHz 5 1
FIGURE 3. OFF ISOLATION TES T CIRCUIT
V+
Typical Applications
Using the VREF Terminal
The DG201 has an internal voltage divider setting the TTL threshold on the input control lines for V+ equal to +15V. The schematic shown in Figure 4 with nom inal resistor values, gives approximately 2.4V on the VREF pin. As the TTL input signal goes from +0.8V to +2.4V, Q 1 and Q 2 switch states to turn the switch ON and OFF. If the power supply voltage is less than +15V, then a resistor (REXT) must be added between V+ and the V R EF pin, to restore +2.4V at V R EF. The table shows the value of this resistor for various supply voltages, to maintain TTL compatibility. If CMOS logic levels with a +5V supply are being used, the threshold shifts are less critical, but a separate column of suitable values is given in the table. For logic swings of -5V to + 5V, no resistor is needed. In general, the "low" logic level should be <0.8V to prevent Q1 and Q2 from both being ON together (this will cause incorrect sw itch function).
TABLE 1. V+ SUPPLY (V ) +15 +12 +10 +9 +8 +7 REXT FOR TTL LEVELS (k) 420 190 136 98 70 REXT FOR CMOS LEVELS (k) 136 98 70
118k Q1 2 3k VREF
REXT
Q2 GATE PROTECTION RESISTOR INPUT
FIGURE 4.
4
DG201 Typical Performance Curves
1 00 DRAIN-SOURCE ON RESISTANCE () V+ = +15V V- = -15V 1 00 DRAIN-SOURCE ON RESISTANCE () D
125 oC 25 oC
C B 50 A A: B: C: D: 0 -15 -10 V+ = +15 V, V- = -15V V+ = +12 V, V- = -12V V+ = +10 V, V- = -10V V+ = +8V, V- = -8 V 10 15
50
-55oC
0 -15
-10
-5 0 5 DRAIN VOLTAGE (V)
10
15
-5 0 5 DRAIN VOLTAGE (V)
FIGURE 5. rDS(ON) vs VD AND TEMPERATURE
CHANNEL ON LEAKAGE CURRENT (nA) 10
FIGUR E 6. r DS(ON) vs VD AND POWER SUP PLY VOLTAGE
10 SOURC E OR DRAIN OFF LEAKAGE CURRENT (nA)
1
1
0 .1
0 .1
0.0 1 25 45 65 85 TEMPERATURE (oC) 105 12 5
0. 01 25 45 65 85 TEMPERATURE (oC) 1 05 12 5
FIGURE 7. ID(ON) vs TEMPER ATU RE
FIGURE 8. IS(OFF) OR ID(OFF) vs TE MP ERATURE
5
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