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Part: PEF2015
Category:
Communication
-> Network
Description: Ics For Communications
Company: Infineon Technologies Corporation
Datasheet: Download PEF2015 datasheet File size : 498 kB
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Datasheet text preview:
ICs for Communications
Mini IOM®-2 Controller MICO PEF 2015 Version 1.1
Data Sheet 12.97
DS 1
PEF 2015 Revision History:
Current Version: Data Sheet 12.97
Previous Version: Preliminary Data Sheet 05.97 Page Page (in previous (in new Version) Version) 34, 58 34, 60 34, 69, 70 77, 78, 80 34, 58 34, 60 34, 69, 70 75, 78 75, 76, 78 Subjects (major changes since last revision)
MFAIR: new reset value = 00xx xxxxB CIFIFO: new reset value = 0xxx xxxxB VNSR register: Reset value corrected to 02H (Version bits for MICO V1.1: 0010) New timing in Motorola mode: tRWh = 10 ns max. (R/W hold time from DS) Timing value and definition changed: tDW = 0 ns min. (Data set-up time to CSxWR / CSxDS in write access)
Edition 12.97 This edition was realized using the software system FrameMaker®. Published by Siemens AG, HL DT CE © Siemens AG 1997. All Rights Reserved. Attention please! As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes and circuits implemented within components or assemblies. The information describes the type of component and shall not be considered as assured characteristics. Terms of delivery and rights to change design reserved. For questions on technology, delivery and prices please contact the Semiconductor Group Offices in Germany or the Siemens Companies and Representatives worldwide (see address list). Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest Siemens Office, Semiconductor Group. Siemens AG is an approved CECC manufacturer. Packing Please use the recycling operators known to you. We can also help you get in touch with your nearest sales office. By agreement we will take packing material back, if it is sorted. You must bear the costs of transport. For packing material that is returned to us unsorted or which we are not obliged to accept, we shall have to invoice you for any costs incurred. Components used in life-support devices or systems must be expressly authorized for such purpose! Critical components1 of the Semiconductor Group of Siemens AG, may only be used in life-support devices or systems2 with the express written approval of the Semiconductor Group of Siemens AG. 1 A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-support device or system, or to affect its safety or effectiveness of that device or system. 2 Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain human life. If they fail, it is reasonable to assume that the health of the user may be endangered.
PEF 2015
1 1.1 1.2 1.3 1.4 1.5 2 2.1 2.2 2.3 2.4 2.5 2.6 3 3.1 3.2 3.3 3.4 3.4.1 3.4.2 3.4.3 3.4.4 3.5 3.5.1 3.5.2 3.5.2.1 3.5.2.2 3.5.2.3 3.5.2.4 3.5.3 4 4.1 4.2 4.2.1 4.2.1.1 4.2.1.2 4.2.1.3 4.2.1.4 4.2.1.5 4.2.1.6
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7 Pinning Diagram (top view) 8 Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9 Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Configurable Interface CFI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Serial PCM Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14 Microprocessor Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Memory Structure and Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Pre-processed Channels, Layer-1 Support . . . . . . . . . . . . . . . . . . . . . . . .17 Special Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17 Operational Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 Microprocessor Interface Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18 Clocking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19 MICO Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 PCM-Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 Configurable Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Switching Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24 Special Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28 Initialization Procedure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 Hardware Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 MICO Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 Register Initialization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 Control Memory Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29 Initialization of Pre-processed Channels . . . . . . . . . . . . . . . . . . . . .30 Initialization of the Upstream Data Memory (DM) Tristate Field . . . .31 Activation of the PCM- and CFI-Interfaces . . . . . . . . . . . . . . . . . . . . . .32 Registers Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 Register Address Arrangement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33 Detailed Register Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 PCM-Interface Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 PCM-Mode Register (PMOD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35 Bit Number per PCM-Frame (PBNR) . . . . . . . . . . . . . . . . . . . . . . . .36 PCM-Offset Downstream Register (POFD) . . . . . . . . . . . . . . . . . . .36 PCM-Offset Upstream Register (POFU) . . . . . . . . . . . . . . . . . . . . .37 PCM-Clock Shift Register (PCSR) . . . . . . . . . . . . . . . . . . . . . . . . . .38 PCM-Input Comparison Mismatch Register (PICM) . . . . . . . . . . . . .38
3 12.97
Semiconductor Group
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