|
|
Part: PEB2045-N
Category:
Description: MTSC (Memory Time Switch CMOS)
Company: Infineon Technologies Corporation
Datasheet: Download PEB2045-N datasheet File size : 1109 kB
Request For quote: Find where to buy PEB2045-N
Datasheet text preview:
Memory Time Switch CMOS (MTSC)
PEB 2045
General Description The MTSC PEB 2045 is a monolithic CMOS circuit, which has the ability to connect any of the 512 PCM channels of 16 incoming PCM lines to any of the 256 PCM channels of eight output lines. The PCM information for a complete frame is stored in the 4-Kbit speech memory SM, i.e. all of the 512 words with 8 bits are written into a fixed position of the SM. This is controlled by the input counter every 125 µs. The words are read using random access with an address that is stored in a connection memory CM for each of the 256 output channels. The access to the CM is controlled by the output counter. To produce a connection the SM address and the CM address must be written into the PEB 2045 via a µP interface. The SM-address contains the time-slots and line numbers of the incoming PCM words. The CM address consists of the time-slots and line numbers of the output words. The PEB 2045 can be connected to 2-Mbit/s, 4-Mbit/s and 8-Mbit/s PCM systems, the device clock may be either 4.096 MHz or 8.192 MHz. In a second operational mode the PEB 2045 together with the PEB 2035 (ACFA, Advanced CMOS Frame Aligner) and the PEB 2235 (IPAT, ISDN Primary Access Transceiver) implements the system interface of up to four primary multiplex access lines. This interface can be configured for 2-Mbit/s, 4-Mbit/s and 8-Mbit/s systems; a clock shift for input and output lines with half clock step resolution is programmable. Selection of operating modes and programming is made by writing to the mode register and, via the Indirect Access Register (IAR), the Clock Shift Register (CSR) and the General Configuration Register (GCR). The components PEB 2045 and PEF 2045 are functionally identical. The difference between the two types lies in the temperature range. The PEB 2045 operates in the temperature range 0 to 70 °C, the PEF 2045 in the range 40 to 85 °C. Applications · All types of switching systems · Concentrator function · Frequency transforming interface between 2-Mbit/s, 4-Mbit/s and 8-Mbit/s PCM systems · 16/16 space switch for 8-Mbit/s PCM systems · System interface for up to four primary multiplex access lines in combination with the PEB 2035 (ACFA) and *PEB 2235 (IPAT)
Type PEB 2045-N PEB 2045-P PEF 2045-N PEF 2045-P Features
Package P-LCC-44-1 (SMD) P-DIP-40-1 (not for new design) P-LCC-44-1 (SMD) P-DIP-40-1 (not for new design)
· Time/space switch for 2.048-, 4.096- and 8.192-kbit/s PCM systems · Different kinds of modes (2048, 4096, 8192 kbit/s or mixed mode) · Switching of up to 512 incoming PCM channels to up to 256 outgoing PCM channels · 16 input and eight output PCM lines · Configurable for primary access and standard applications · Programmable clock shift with half clock step resolution for input and output in primary access configuration · Configurable for a 4096- and 8192-kHz device clock · Tristate function for further expansion and tandem operation · Tristate control signals for external drivers in primary access configuration · 2048-kHz clock output in primary access configuration · Space switch mode · 8-bit µP interface · Single + 5-V power supply · Advanced low power CMOS technology
Siemens Aktiengesellschaft
1
Memory Time Switch CMOS (MTSC)
PEB 2045
IN0 D 7 - D0 MOD A0 RD WR CS CCS A GCR CM d d r e s s Gen IAR I µP nterface STA Connection M emory C M
IN15
P C M IN S
Mp e e c h emory S M
T i m i n g Control P C M OUT C
Block Diagram
SP
LK
OUT 0
OUT 7
ITB00554
I Line nterface 1 . 5 4 4 Mbit / s 2 . 0 4 8 Mbit / s
D u a l Rail Interface
P Internal Hr i m a r y 2 ighway . 0 4 8 Mbit / s
I System 2n t e r f a c e . 0 4 8 / 4.096 / 8 . 1 9 2 Mbit / s
S
E B 2045 MTSC
O
P E B 2235 IPAT®
P E B 2035 ACFA A B 82525 HSCX
P
ITB00544
ptimized System Interface for Four Primary Multiplex Access Lines
Siemens Aktiengesellschaft
2
Memory Time Switch CMOS (MTSC)
PEB 2045
P E x 2045 PCM IN 2 MHz P E x 2045 16
8 PCM OUT 2 MHz 8
ITS00583
M e m o r y time switch 16/16 for a non-blocking 512-channel switch
P E x 2045 11
P E x 2045 21
8
16
P E x 2045 12
P E x 2045 22
8
PCM IN 2 MHz 16 P E x 2045 23 P E x 2045 13
PCM OUT 2 MHz 8
P E x 2045 24
P E x 2045 14
8
ITS00584
M e m o r y time switch 32/32 for a non-blocking 1024-channel switch using tristate function
Block Diagram of two PCM Switch Configurations with PEB 2045
Siemens Aktiengesellschaft
3
Others parts begin by pe
PE-1 PE-2 PE-3 PE-4 PE-5 PE-6 PE-7 PE-8
|
|
|