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Part: HYM7V651601BTFG-P
Category:
Memory
-> DRAM
-> SDR SDRAM
-> Modules
-> 64 MB
Description: 16Mx64 Bits PC100 Sdram Unbuffered Dimm Based on 8Mx8 Sdram With Lvttl, 4 Banks & 4K Refresh
Company: Hynix Semiconductor
Datasheet: Download HYM7V651601BTFG-P datasheet File size : 904 kB
Request For quote: Find where to buy HYM7V651601BTFG-P
Datasheet text preview:
16Mx64 bits PC100 SDRAM Unbuffered DIMM
based on 8Mx8 SDRAM with LVTTL, 4 banks & 4K Refresh
HYM7V651601B F-Series DESCRIPTION
The Hynix HYM7V651601B F-Series are 16Mx64bits Synchronous DRAM Modules. The modules are composed of sixteen 8Mx8bit CMOS Synchronous DRAMs in 400mil 54pin TSOP-II package, one 2Kbit EEPROM in 8pin TSSOP package on a 168pin glass-epoxy printed circuit board. A 0.33uF and a 0.1uF decoupling capacitors per each SDRAM are mounted on the PCB. The HYM7V651601B F-Series are Dual In-line Memory Modules suitable for easy interchange and addition of 128Mbytes memory. The HYM7V651601B F-Series are offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are internally pipelined to achieve very high bandwidth.
FEATURES
· PC100MHz support · 168pin SDRAM Unbuffered DIMM · Serial Presence Detect with EEPROM · 1.375" (34.93mm) Height PCB with Double Sided components · Single 3.3 ± 0.3V power supply · All devices pins are compatible with LVTTL interface · Data mask function by DQM · SDRAM internal banks : four banks · Module banks : two physical banks · Auto refresh and self refresh · 4096 refresh cycles / 64ms · Programmable Burst Length and Burst Type -. 1, 2, 4, 8, or Full Page for Sequential Burst -. 1, 2, 4 or 8 for Interleave Burst · Programmable /CAS Latency -. 2, 3 Clocks
ORDERING INFORMATION
PART NO. HYM7V651601BTFG-8 HYM7V651601BTFG-10P HYM7V651601BTFG-10S MAX. FREQUENCY 125MHz 100MHz 100MHz 4 Banks 4K Normal TSOP-II Gold INTERNAL BANK REF. POWER SDRAM PACKAGE PLATING
This document is a general product description and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 1.1/Apr.01 ©1999 Hyundai Electronics
PC100 SDRAM Unbuffered DIMM
HYM7V651601B F-Series PIN DESCRIPTION
PIN NAME C K 0 ~CK3 CKE0, CKE1 /S0~/S3 BA0, BA1 A0~A11 /RAS /CAS /WE DQM0~DQM7 DQ0~DQ63 VCC VSS SCL SDA SA0~SA2 WP NC Clock Inputs Clock Enable Chip Select SDRAM Bank Address Address Inputs Row Address Strobe Column Address Strobe Write Enable Data Input/Output Mask Data Input/Output Power Supply (3.3V) Ground SPD Clock Input SPD Data Input/Output SPD Address Input Write Protect for SPD No Connect DESCRIPTION The System Clock Input. All other inputs are registered to the SDRAM on the rising edge of CLK. Controls internal clock signal and when deactivated, the SDRAM will be one of the states among power down, suspend or self refresh. Enables or disables all inputs except CK, CKE and DQM. Select bank to be activated during /RAS activity. Select bank to be read/written during /CAS activity Row address : RA0~RA11, Column address : CA0~CA8 Auto-precharge flag : A10 /RAS define the operation. Refer to the function truth table for details. /CAS define the operation. Refer to the function truth table for details. /WE define the operation. Refer to the function truth table for details. Controls output buffers in read mode and masks input data in write mode. Multiplexed data input/output pins Power supply for internal circuits and input/output buffers Ground Serial Presence Detect Clock Input Serial Presence Detect Data input/output Serial Presence Detect Address input Write Protect for Serial Presence Detect on DIMM No Connect or Don't Use
Rev. 1.01Apr.01
2
PC100 SDRAM Unbuffered DIMM
HYM7V651601B F-Series PIN ASSIGNMENTS
FRONT SIDE PIN NO. NAME 1 2 3 4 5 6 7 8 9 10 VSS DQ0 DQ1 DQ2 DQ3 VCC DQ4 DQ5 DQ6 DQ7 BACK SIDE PIN NO. NAME 85 86 87 88 89 90 91 92 93 94 VSS DQ32 DQ33 DQ34 DQ35 VCC DQ36 DQ37 DQ38 DQ39 FRONT SIDE PIN NO. NAME 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 VCC CK0 VSS NC /S2 DQM2 DQM3 NC VCC NC NC NC NC VSS DQ16 DQ17 DQ18 DQ19 VCC DQ20 NC NC CKE1 VSS DQ21 DQ22 DQ23 VSS DQ24 DQ25 DQ26 DQ27 VCC DQ28 DQ29 DQ30 DQ31 VSS CK2 NC WP SDA SCL VCC BACK SIDE PIN NO. NAME 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 CK1 NC VSS CKE0 /S3 DQM6 DQM7 NC VCC NC NC NC NC VSS DQ48 DQ49 DQ50 DQ51 VCC DQ52 NC NC NC VSS DQ53 DQ54 DQ55 VSS DQ56 DQ57 DQ58 DQ59 VCC DQ60 DQ61 DQ62 DQ63 VSS CK3 NC SA0 SA1 SA2 VCC
Architecture Key
11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 DQ8 VSS DQ9 DQ10 DQ11 DQ12 DQ13 VCC DQ14 DQ15 NC NC VSS NC NC VCC /WE DQM0 DQM1 /S0 NC VSS A0 A2 A4 A6 A8 A10/AP BA1 VCC 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 DQ40 VSS DQ41 DQ42 DQ43 DQ44 DQ45 VCC DQ46 DQ47 NC NC VSS NC NC VCC /CAS DQM4 DQM5 /S1 /RAS VSS A1 A3 A5 A7 A9 BA0 A11 VCC
Voltage Key
Rev. 1.01Apr.01
3
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