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Part: 100395CW
Category:
Logic
-> Level Translators
-> Bipolar->ECL 100 Family
Description: Low Power 9-Bit Ecl-to-ttl Translator With Registers
Company: Fairchild Semiconductor
Datasheet: Download 100395CW datasheet File size : 369 kB
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Datasheet text preview:
100395 Low Power 9-Bit ECL-to-TTL Translator with Registers
February 1990 Revised November 1999
100395 Low Power 9-Bit ECL-to-TTL Translator with Registers
General Description
The 100395 is a 9-bit translator for converting F100K logic levels to TTL logic levels. A HIGH on the output enable (OE) holds the TTL outputs in a high impedance state. Two separate clock inputs are available for multiplexing and system level testing. The 100395 is designed with TTL 64 mA outputs for bus driving capability. All inputs have 50 k pull down resistors. When the inputs are either unconnected or at the same potential, the outputs will go LOW.
Features
s 64 mA IOL drive capability s 2000V ESD protection s -4.2V to -5.7V operating range s Registered outputs s TTL outputs
Ordering Code:
Order Number 100395QC Package Number V28A Package Description 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names D0D8 Q0Q8 OE CP1, CP2 Description Data Inputs (ECL) Data Outputs (TTL) Output Enable (ECL) Clock Inputs (ECL)
Truth Table
Inputs CP1 L L Outputs DN L L H H X X X X QN L L H H NC NC NC Z
L L H X L X X L X H
CP 2
OE L L L L X X X H
H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care
Z = High Impedance NC = No Change
© 1999 Fairchild Semiconductor Corporation
DS010651
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100395
Logic Diagram
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100395
Absolute Maximum Ratings(Note 1)
Storage Temperature (TSTG) Maximum Junction Temperature (TJ) Case Temperature under Bias (TC) VEE Pin Potential to Ground Pin VTTL Pin Potential to Ground Pin ECL Input Voltage (DC) TTL Input Voltage Output Current (DC Output HIGH) ESD (Note 2) +130 mA 2000V -65°C to +150°C +150°C 0°C to +85°C -7.0V to +0.5V -0.5V to +6.0V VEE to +0.5V -0.5V to +7.0V
Recommended Operating Conditions
Case Temperature (TC) Supply Voltage VEE VTTL -5.7V to -4.2V +4.5V to +5.5V 0°C to +85°C
Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
Commercial Version DC Electrical Characteristics (Note 3)
VEE = -4.2V to -5.7V, VCC = VCCA = GND, TC = 0°C to +85°C
Symbol VOH VOL VIH VIL IIL IIH IOZL IOZH ICEX IOS IEE ICCH ICCL ICCZ Parameter Output HIGH Voltage Output LOW Voltage Input HIGH Voltage Input LOW Voltage Input LOW Current Input HIGH Current 3-STATE Current Output HIGH 3-STATE Current Output LOW Output HIGH Leakage Current Output Short-Circuit Current VEE Power Supply Current VTTL Power Supply Current HIGH VTTL Power Supply Current LOW VTTL Power Supply Current 3-STATE -100 -67 -1165 -1830 0.5 240 -50 +50 250 -225 -29 29 65 49 M in 2.4 0.55 -870 -1475 Typ Max Units V V mV mV µA µA µA µA µA mA mA mA mA mA Inputs OPEN IOH = -15 mA IOL = 64 mA Conditions VIN = VIH (Max) or VIL (Min)
Guaranteed HIGH Signal for All Inputs Guaranteed LOW Signal for All Inputs VIN = VIL (Min) VIN = VIH (Max) VOUT = +0.4V VOUT = +2.7V VOUT = VCC
Note 3: The specified limits represent the "worst case" value for the parameter. Since these values normally occur at the temperature extremes, additional noise immunity and guardbanding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under "worst case" conditions.
PLCC AC Electrical Characteristics
VEE = -4.2V to -5.7V, VCC = GND, VTTL = +4.5V to +5.5V Symbol tPLH tPHL tPZL tPZH tPLZ tPHZ tH Parameter Propagation Delay Clock to Output Output Enable Time OE to QN Output Disable Time OE to QN Data to CP EN Hold Time tS tPW(H) Data to CP EN Setup Time Clock Pulse Width TC = 0°C Min 2.30 3.00 3.20 2.40 3.20 2.40 1.5 1 .5 0.5 0.5 2.0 M ax 5.00 5.60 7.60 5.60 7.60 5.60 TC = +25°C Min 2.30 3.00 3.20 2.40 3.20 2.40 1.5 1.5 0.5 0.5 2.0 Max 5.00 5.60 7.60 5.60 7.60 5.60 TC = +85°C Min 2.30 3.40 3.20 2.40 3.20 2.40 1.5 ns 1 .5 0.5 ns 0.5 2.0 ns Figures 1Figure 2 Figures 1, 2 Figures 1, 2 Max 5.00 6.40 7.60 5.60 7.60 5.60 Units ns ns ns Conditions Figures 1, 2 Figures 1, 3 Figures 1, 3
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100395
Test Circuit
Notes: VCC = 0V, VCCA = 0V, VEE = -4.5V, VTTL = +5V. All unused outputs are loaded with 500 to GND. Decoupling capacitors are necessary in the test and end application environment. When VCC and VCCA are common to a single power plane, typically 0.0V, decouple VTTL to that plane with one 0.01 µF capacitor.
FIGURE 1. AC Test Circuit Switch Positions for Parameter Testing
Parameter tPLH, tPHL tPHZ, tPZH tPLZ, tPZL S-Position Open Open Closed
Switching Waveforms
FIGURE 2. Propagation Delay and Transition Times
FIGURE 3. Enable and Disable Waveforms, OE to QN
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100395 Low Power 9-Bit ECL-to-TTL Translator with Registers
Physical Dimensions inches (millimeters) unless otherwise noted
28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Package Number V28A
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at any time without notice to change said circuitry and specifications. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the user. 5 2. A critical component in any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. www.fairchildsemi.com
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