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Part: 100393QCX
Category:
Description: Low Power 9-Bit Ecl-to-ttl Translator With Latches
Company: Fairchild Semiconductor
Datasheet: Download 100393QCX datasheet File size : 369 kB
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100393 Low Power 9-Bit ECL-to-TTL Translator with Latches
February 1990 Revised November 1999
100393 Low Power 9-Bit ECL-to-TTL Translator with Latches
General Description
The 100393 is a 9-bit translator for converting F100K logic levels to TTL logic levels. A LOW on the latch enable (LE) latches the data at the input state. A HIGH on the LE makes the latches transparent. A HIGH on either the ECL or TTL output enable (OE ECL or OE TTL), holds the outputs in a high impedance state. The 100393 is designed with TTL, 64 mA outputs for Bus Driving capability. All ECL inputs have 50 k pull-down resistors. When the inputs are either unconnected or at the same potential, the outputs will go LOW.
Features
s 64 mA IOL drive capability s 2000V ESD protection s -4.2V to -5.7V operating range s Latched outputs s TTL outputs
Ordering Code:
Order Number 100393QC Package Number V28A Package Description 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square
Devices also available in Tape and Reel. Specify by appending the suffix letter "X" to the ordering code.
Logic Symbol
Connection Diagram
Pin Descriptions
Pin Names D0D8 Q0Q8 LE OE TTL OE ECL Description Data Inputs (ECL) Data Outputs (TTL) Latch Enable Input (ECL) Output Enable (TTL) Output Enable (ECL)
© 1999 Fairchild Semiconductor Corporation
DS010650
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100393
Truth Table
Inputs OE TTL L L L H X
H = HIGH Voltage Level L = LOW Voltage Level X = Don't Care Z = High Impedance
Outputs LE H H L X X DN L H X X X QN L H Latched Z Z
OE ECL L L L X H
Logic Diagram
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Absolute Maximum Ratings(Note 1)
Storage Temperature (TSTG) Maximum Junction Temperature (TJ) Case Temperature under Bias (TC) VEE Pin Potential to Ground Pin VTTL Pin Potential to Ground Pin ECL Input Voltage (DC) TTL Input Voltage Output Current (DC Output HIGH) ESD (Note 2) -65°C to +150°C +150°C 0°C to +85°C -7.0V to +0.5V -0.5V to +6.0V VEE to +0.5V -0.5V to +7.0V +130 mA 2000V
Recommended Operating Conditions
Case Temperature (TC) Supply Voltage VEE VTTL -5.7V to -4.2V +4.5V to +5.5V 0°C to +85°C
Note 1: The "Absolute Maximum Ratings" are those values beyond which the safety of the device cannot be guaranteed. The device should not be operated at these limits. The parametric values defined in the Electrical Characteristics tables are not guaranteed at the absolute maximum rating. The "Recommended Operating Conditions" table will define the conditions for actual device operation. Note 2: ESD testing conforms to MIL-STD-883, Method 3015.
DC Electrical Characteristics (Note 3)
VEE = -4.2V to -5.7V; VCC = VCCA = GND, VTTL = +4.5V to +5.5V, TC = 0°C to +85°C
Symbol VOH VOL VIH Parameter Output HIGH Voltage Output LOW Voltage Input HIGH Voltage ECL Inputs OE TTL VIL Input LOW Voltage ECL Inputs OE TTL IB V I IIH Input Breakdown Current ECL Input HIGH Current ECL Inputs OE ECL TTL Input HIGH Current IIL ECL Input LOW Current TTL Input LOW Current IC E X IOS IOZH IOZL VFCD IE E ICCH ICCL ICCZ Output HIGH Leakage Current Output Short-Circuit Current 3-STATE Current Output HIGH 3-STATE Current Output LOW Input Clamp Diode Voltage VEE Power Supply Current VTTL Power Supply Current HIGH VTTL Power Supply Current LOW VTTL Power Supply Current 3-STATE - 39 -100 OE TTL ECL Inputs OE TTL 0.5 - 50 250 -225 + 50 - 50 - 1.2 - 18 29 65 49 -1165 2.0 -1830 -1475 0.8 10 240 350 5.0 Min 2.5 2.0 0.55 0.50 -870 Typ M ax Units V V mV Guaranteed HIGH Signal for All Inputs V mV Guaranteed LOW Signal for All Inputs V µA µA µA µA µA µA mA µA µA V mA mA mA mA VOUT = 0.0V, VTTL = +5.5V VOUT = +2.7V VOUT = 0.5V IIN = -18 mA Inputs OPEN VBI = 7.0V VIN = VIH (Max) VIN = 2.7V VIN = VIL (Min) VIN = 0.5V IOH = -1 mA IOH = -15 mA IOL = 64 mA IOL = 24 mA Conditions VIN = VIL (Min) or VIH (Max) VIN = VIL (Min) or VIH (Max)
Note 3: The specified limits represent the "worst case" value for the parameter. Since these "worst case" values normally occur at the temperature extremes, additional noise immunity and guard banding can be achieved by decreasing the allowable system operating ranges. Conditions for testing shown in the tables are chosen to guarantee operation under "worst case" conditions.
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100393
AC Electrical Characteristics
VEE = -4.2V to -5.7V, VCC = GND, VTTL = +4.5V to +5.5V Symbol tPLH tP H L tPLH tP H L tPZH tPZL tP H Z tPLZ tPZH tPZL tP H Z tPLZ tS tH tPW (L) Parameter Propagation Delay Data to Output Propagation Delay LE to Output Output Enable Time OE TTL to QN Output Disable Time OE TTL to QN Output Enable Time OE ECL to QN Output Disable Time OE ECL to QN Setup Time, DN to LE Hold Time, DN to LE Pulse Width LOW, LE TC = 0°C Min 2.3 2.3 2.0 3.5 2.0 2.0 2.4 3.2 2.4 3.2 0.7 1.3 2.0 Max 4 .8 5 .6 5 .5 8 .0 6.0 5 .5 5.6 8 .5 6.0 7 .6 TC = +25°C Min 2.3 2.3 2.0 3.5 2.0 2.0 2.4 3.2 2.4 3.2 0 .7 1 .3 2.0 Max 4 .8 5 .6 5 .5 8 .0 6.0 5 .0 5.6 8 .5 6.0 7 .6 TC = +85°C Min 2.3 2.3 2.0 3.5 2.0 2.0 2.4 3.2 2.4 3.2 0.7 1.3 2.0 Max 5 .3 6 .4 5 .5 8 .0 6.0 5 .0 5.6 8 .5 6.0 7 .6 Units ns ns ns ns ns ns ns ns ns Conditions Figures 1, 2 Figures 1, 2 Figure 3 Figure 3 Figure 4 Figure 4 Figures 1, 2 Figures 1, 2 Figures 1Figure 2
Test Circuit
Switch Positions
for Parameter Testing
Parameter tPLH, tPHL tPHZ, tPZH tPLZ, tPZL
S-Position Open Open Open
FIGURE 1. AC Test Setup
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Switching Waveforms
FIGURE 2. Propagation Delays, Setup and Hold Times, and Pulse Width
FIGURE 3. Enable and Disable Waveforms, OE TTL
FIGURE 4. Enable and Disable Waveforms, OE ECL
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