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Part: EDL1216BASA-75-E

Category:
 Memory
   -> DRAM
     -> SDR SDRAM
             -> Mobile RAM

Description: 128M; 133MHz DDR Sdram So-dimm

Company: Elpida Memory

Datasheet: Download EDL1216BASA-75-E datasheet     File size : 612 kB

Request For quote: Find where to buy EDL1216BASA-75-E



Datasheet text preview:
DATA SHEET

128M bits Mobile RAM
EDL1216BASA (8M words × 16 bits)
Description
The EDL1216BA is a 128M bits Mobile RAM organized as 2,097,152 words × 16 bits × 4 banks. The Mobile RAM achieved low power consumption and high-speed data transfer using the pipeline architecture. All inputs and outputs are synchronized with the positive edge of the clock. This product is packaged in 54-ball FBGA (µBGA).

Pin Configurations
/xxx indicates active low signal.
54-ball FBGA ( BGA)
1 A
VSS DQ15 VSSQ VDDQ DQ0 VDD

2

3

4

5

6

7

8

9

Features
· Low voltage power supply VDD: 2.5V ± 0.2V VDDQ: 2.5V ± 0.2V · Wide temperature range (-25°C to 85°C) · Programmable partial self refresh · Programmable driver strength · Programmable temperature compensated self refresh (Option) · Deep power down mode · Small package (54-ball FBGA (µBGA)) · Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge · Pulsed interface · Possible to assert random column address in every cycle · Quad internal banks controlled by BA0 and BA1 · Byte control by LDQM and UDQM · Wrap sequence = Sequential/ Interleave · /CAS latency (CL) = 2, 3 · Automatic precharge and controlled precharge · Auto refresh and self refresh · ×16 organization · 4,096 refresh cycles/64ms · Burst termination by Burst stop command and Precharge command · FBGA(µBGA) package is lead free solder (Sn-Ag-Cu)

B
DQ14 DQ13 VDDQ VSSQ DQ2 DQ1

C
DQ12 DQ11 VSSQ VDDQ DQ4 DQ3

D
DQ10 DQ9 VDDQ VSSQ DQ6 DQ5

E
DQ8 NC VSS VDD LDQM DQ7

F
UDQM CLK CKE /CAS /RAS /WE

G
NC A11 A9 BA0 BA1 /CS

H
A8 A7 A6 A0 A1 A10

J
VSS A5 A4 A3 A2 VDD

(Top view)

Applications
Mobile cellular handsets, PDAs, wireless PDAs, handheld PCs, home electronic appliances, and information appliances, etc.

A0 to A11 BA0, BA1 DQ0 to DQ15 CLK CKE /CS /RAS /CAS /WE UDQM LDQM VDD VSS VDDQ VSSQ NC

Address inputs Bank select Data inputs/ outputs Clock input Clock enable Chip select Row address strobe Column address strobe Write enable Upper DQ mask enable Lower DQ mask enable Power supply Ground Power supply for DQ Ground for DQ No connection

Document No. E0255E40 (Ver. 4.0) Date Published March 2003 (K) Japan URL: http://www.elpida.com Elpida Memory, Inc. 2002-2003

EDL1216BASA
Ordering Information
Part number EDL1216BASA-75-E Organization (words × bits) 8M × 16 Internal Banks 4 Clock frequency MHz (max.) 133 /CAS latency 3 Package 54-ball FBGA (µBGA)

Part Number

E D L 12 16 B A SA - 75 - E
Elpida Memory Type D: Monolithic Device Product Code L: Mobile RAM Density / Bank 12: 128M / 4 banks Bit Organization 16: x16 Voltage, Interface B: VDD = 2.5V, VDDQ = 2.5V, LVCMOS Environment Code E: Lead Free Speed 75: 133MHz/CL3, 100MHz/CL2 Package SA: µBGA Die Rev.

Data Sheet E0255E40 (Ver. 4.0)

2

EDL1216BASA
CONTENTS Description...........1 Features......1 Applications ......... 1 Pin Configurations ........ 1 Ordering Information.....2 Part Number ........ 2 Electrical Specifications......4 Pin Function.........9 Command Operation .. 10 Truth Table ........ 14 Simplified State Diagram ........... 19 Initialization ........ 20 Programming Mode Registers............20 Address Bits of Bank-Select and Precharge ..... 24 Operation of the Mobile RAM .... 25 Timing Waveforms......33 Package Drawing ....... 56 Recommended Soldering Conditions .......... 57

Data Sheet E0255E40 (Ver. 4.0)

3

EDL1216BASA
Electrical Specifications
· All voltages are referenced to VSS (GND). · After power up, wait more than 200 µs and then, execute Power on sequence and two Auto Refresh before proper device operation is achieved. Absolute Maximum Ratings
Parameter Voltage on any pin relative to VSS Supply voltage relative to VSS Short circuit output current Power dissipation Operating ambient temperature Storage temperature Symbol VT VDD, VDDQ IOS PD TA Tstg Rating ­0.5 to +3.6 ­0.5 to +3.6 50 1.0 ­25 to +85 ­55 to +125 Unit V V mA W °C °C Note

Caution Exposing the device to stress above those listed in Absolute Maximum Ratings could cause permanent damage. The device is not meant to be operated under conditions outside the limits described in the operational section of this specification. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Recommended DC Operating Conditions (TA = ­25 to +85°C) °
Parameter Supply voltage DQ Supply voltage Input high voltage Input low voltage Symbol VDD VSS VDDQ VIH VIL min. 2.3 0 2.3 0.8 × VDDQ ­0.3*
2

typ. 2.5 0 2.5

max. 2.7 0 2.7 VDDQ + 0.3*1 0.3

Unit V V V V V

Notes

Notes: 1. VIH (max.) = VDDQ + 1.5V (pulse width 5ns). 2. VIL (min.) = ­1.5V (pulse width 5ns).

Data Sheet E0255E40 (Ver. 4.0)

4

EDL1216BASA
DC Characteristics 1 (TA = ­25 to +85°C, VDD = 2.5V ± 0.2V, VDDQ = 2.5V ± 0.2V, VSS, VSSQ = 0V) °
Parameter /CAS latency Operating current (CL = 2) (CL = 3) Standby current in power down Standby current in power down (input signal stable) Standby current in non power down Standby current in non power down (input signal stable) Active standby current in power down Active standby current in power down (input signal stable) Active standby current in non power down Symbol IDD1 IDD1 IDD2P IDD2PS Grade max. 65 65 1 0.6 Unit mA mA mA mA Test condition Burst length = 1 tRC tRC min., IO = 0mA, One bank active CKE VIL max., tCK = 15ns CKE VIL max., tCK = CKE VIH min., tCK = 15ns, /CS VIH min., Input signals are changed one time during 30ns. CKE VIH min., tCK = , Input signals are stable. CKE VIL max., tCK = 15ns CKE VIL max., tCK = CKE VIH min., tCK = 15 ns, /CS VIH min., Input signals are changed one time during 30ns. CKE VIH min., tCK = , Input signals are stable. tCK tCK min., 2 IOUT = 0mA, All banks active Notes 1

IDD2N

5.5

mA

IDD2NS IDD3P IDD3PS

2 1.5 1

mA mA mA

IDD3N

17

mA

Active standby current in non IDD3NS power down (input signal stable) Burst operating current IDD4 (CL = 2) (CL = 3) Refresh current (CL = 2) (CL = 3) Self refresh current PASR="000" (Full) PASR="001" (2BK) PASR="010" (1BK) PASR="101" (1/2 BK) PASR="110" (1/4 BK) PASR="000" (Full) PASR="001" (2BK) PASR="010" (1BK) PASR="101" (1/2 BK) PASR="110" (1/4 BK) PASR="000" (Full) PASR="001" (2BK) PASR="010" (1BK) PASR="101" (1/2 BK) PASR="110" (1/4 BK) Standby current in deep power down mode IDD7 IDD6 IDD6 IDD4 IDD5 IDD5 IDD6

12 60 80 155 155 0.35 0.25 0.185 0.16 0.14 0.20 0.165 0.14 0.12 0.115 0.35 0.25 0.185 0.16 0.14 10

mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA mA µA

tRC tRC min.

3

TCSR="00" (Ts*4 70°C) CKE 0.2V

TCSR="01" (Ts*4 45°C) CKE 0.2V

TCSR="11" (Ts*4 85°C) CKE 0.2V

CKE 0.2V

Data Sheet E0255E40 (Ver. 4.0)

5




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