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Part: DBS907
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Description:
Company: Analogic Corporation
Datasheet: Download DBS907 datasheet File size : 1040 kB
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DBS907 907LM/907HV
1 GS/s VXI Waveform Digitizer Plug-In Module
Plugs into the Analogic DBS 9905 "C" Size VXI Carrier Module
Introduction
The Analogic DBS907 is a 1 GigaSamples/second Waveform Digitizer that plugs into the DBS 9905 "C" size VXI carrier module. One or two DBS907s can be installed in a single DBS 9905. This mezzanine board concept enables a single VXI chassis slot to provide multiple functions, thereby maximizing VXI resources and decreasing the cost per slot. The DBS907 provides a combination of speed, resolution, and size that, until now, was unavailable, and it builds on the Analogic tradition of providing the highest possible state-of-the-art performance at the lowest price available. The DBS907's broad sampling rate range of 100 S/s to 1 GS/s coupled with an i n p u t bandwidth of DC to 500 MHz (3 dB), 8-bit resolution and 2 MegaSamples (8 MS for DBS907 LM) on-board memory position it for use in Telecommunications, Magnetic Media, Automotive, Time-of-Flight Mass Spectroscopy, Computing, Particle Physics, Military, Explosive-Weapons and Ballistic Testing applications. User programmable configuration of the DBS907's front end further optimizes the digitizer's performance and can be used to satisfy specific requirements in these and other applications.
Features
1 GS/s Sampling Rate 500 MHz Bandwidth 2 MS Acquisition Memory (8 MS Option) Internal Calibration Input Protection Pre- and Post-Triggering High Resolution Trigger Timer Interpolator Low Power Consumption (<15W) VXI Plug & Play Software TV Trigger High Voltage Option Trigger Holdoff
General Description
The DBS907 is a single-channel, 8-bit, 1 GS/s Waveform Digitizer with 2 MS (8 MS for DBS907LM) of on-board memory. The DBS907 front end can be programmed for AC or DC coupling and 50 or 1 M input impedance, making it easily adaptable for use with either coaxial transmission cable or high impedance probes. The high impedance mode also features very low, 10 pF capacitance that helps minimize the loading effect that can occur when probing high frequency circuits. A programmable amplifier is used to optimize the DBS907's dynamic range by scaling the input to a Full Scale Range (FSR) that is appropriate for the signal of interest. Available ranges are; 50 mV, 100 mV, 200 mV, 500 mV, and 1V, 2V and 5V on the DBS907 and LM versions; or 10V, 20V and 50V on the DBS907HV. A variable offset of ±2V for all mV ranges or ±20V (±100V on DBS907HV) for the higher FSRs can also be employed to maintain the digitizer's dynamic range in instances where the signal of interest is not centered around 0V. A crystal-controlled time base, accurate to ±25 ppm, is used to clock the DBS907's ADC subsystem. A Trigger Time Interpolator (TTI), with 5 ps resolution max, is also used to measure the time from the trigger to the first sample point. The sampling rate has a range of 100 S/s to 1 GS/s and is programmed in increments of 1, 2, 2.5, 4 or 5 (e.g., 1 MS/s, 2 MS/s, 2.5 MS/s, 4 MS/s, 5 MS/s, 10 MS/s, etc.). For divergent sample rates or to synchronize the ADC clock with the signal of interest, an external clock signal input is available. Data acquisition may be triggered from the input signal itself, the internal trigger, an external signal input or VXI TTLTRG lines. In most cases the trigger condition can be more precisely defined by selecting the trigger slope and trigger level (threshold) as well as a trigger coupling mode, DC or AC LFReject. The trigger level is defined as a set voltage at which the selected trigger source will produce a valid trigger. (NOTE: All trigger circuits have sensitivity levels that must be exceeded in orderfor reliable triggering to occur.) Regardless of the trigger source, data is captured around the specified trigger event and stored as user-defined, pre- or post-trigger
Applications
Telecommunications Magnetic Media Ultrasonic Radar ATE Vibration Analysis Time-of-Flight Mass Spectroscopy Beam Instrumentation
b
us
Signal Input
Input Signal Amplifier 1 M
8 Bit 1 GS/s SH + ADC
8 Bit 1 GS/s
Ext. Memories DEMUX 128K Acq Mem
50
Clk TIMEBASE 2 Meg
Trigger Input
Trigger Signal Amplifier Thr DAC
TRIGGER Circuit
50
1 M Cal DAC
Card Controller
DBS 9905 Interface
VXI Bus
Figure 1. DBS907 Block Diagram.
data. A pre-trigger delay can be adjusted from 0% (all data points acquired after the trigger) to 100% (all data points acquired before the trigger) of the acquisition frame, or anywhere in between. Post-trigger delay can be adjusted between 0 and 200 million samples. Data from the ADC is stored in on-board memory. Trigger hold off is also provided with a range of 65K events maximum at a resolution of one event or 6.5 ms maximum at a resolution of 100 ns. The a m o u n t of data stored is programmable and can range from 100 samples to the full 2 MS (8 MS for DBS907LM). TV trigger with support for either 625 lines per frame (50 Hz) or 525 lines per frame (60 Hz) is standard on all DBS907 configurations.
Modes of Operation
T h e DBS907 has two acquisition modes, Single and Sequence. These modes provide an efficient means of utilizing memory while taking advantage of the DBS907's high sampling rate.
Single Acquisition Mode
Acquired waveforms are the result of a series of ADC measurements (sample points) taken at a uniform clock rate. In this mode the user selects the desired sampling rate and acquisition memory size and sets the number of segments to 1. Each waveform is then recorded using a single trigger.
Software
A VXI Plug & Play compliant software driver is supplied that supports all functions of the DBS907 and provides automatic recognition and configuration for all plug-in modules that are installed in the DBS 9905 carrier unit. The source code is included as well as .DLL files to allow easy p o r t i n g to most popular programming environments. These drivers exceed VXI Plug & Play requirements to help ensure that system integration and software development time are reduced to an absolute minimum. In addition, a comprehensive set of measurement functions is included with each module: Frequency, Volts amplitude, Volts average, Volts maximum, Volts peak-to-peak, Volts minimum, VAC RMS, VDC, +Pulse Width, Pulse Width, Rise Time, Fall Time, Period, Duty Cycle, Delay, Volts Base. Volts Top, Overshoot. Operations supported include: Add, Substract, Multiply, Divide, FFT.
Sequence Acquisition Mode
In this mode the acquisition memory is divided into a preselected number of segments between two and four thousand. Each segment is then used to store waveforms acquired from successive triggers. In this mode the trigger re-arm time is less than 500 ns, resulting in very low "dead time" (when the digitizer cannot acquire data from a new trigger event). In this mode each trigger event is time stamped. Readout of the individual trigger time stamps makes it possible to determine the time (with 5 ps resolution) between one trigger to any other trigger in the sequential acquisition.
Multi-Module Synchronization
All DBS907 digitizers include a proprietary, high bandwidth, auto-synchronous bus system, ASBus, that distributes both the clock and trigger signals along an optional, module-to-module, plug-in, bus connector. This allows two digitizers to work together sychronously to, in effect, create a 2-channel system.
DBS907 907LM/907HV
Specifications
SIGNAL INPUT
Parameter Bandwidth Full Scale Range (p-p) Condition 3 dB Low-level High-level Offset Range 500 mV FSR 1V FSR 10V FSR Programmable Value DC to 500 MHz (907/LM) >250 MHz (907HV) 50 mV, 100 mV, 200 mV, 500 mV 1V, 2V, 5V (907/LM) 10V, 20V, 50V (907HV) ±2V range ±20V range ±100V range 1 M/10 pF; 50 ±0.5% 1 single-ended AC or DC 100V (DC+peak AC < 10 kHz) ±5V DC (500 mW) or 5V RMS 250V (DC+peak AC < 10 kHz) 15 ns (typ.) Parameter Clock Accuracy Acquisition Modes Trigger Dead Time Trigger Time Interpolator
TIME BASE
Condition Internal Clock Single Shot Sequence Sequence Mode Sequence Mode Value < 25 ppm 100 to 2M or 8 Msamples 1 to 4k or 16k segments < 500 ns 5 ps resolution
SYSTEM PERFORMANCE
Parameter DC Accuracy Integral Linearity ENOB (at 1 GS/s) SFDR Temperature Drift Condition Value 6.8 > 6.0 44 dB typ. < 1000 ppm FSR/°C < 200 ppm FSR/°C
Input Impedance Number of Channels Input Coupling Over Voltage Protection
Overload Recovery Time
Overshoot Long Term Settling Time Connector Type
Programmable @1 M Input Impedance @50 Input Impedance @1 M Input Impedance (HV only) @2% FSR with 2 x FSR positive or negative 100 ns pulse returning to 0V With 500 ps rise time pulse @0.5% of step amplitude (80% FSR)
DC 20 MHz 20 100 MHz 100 MHz Offset Gain
EXTERNAL INPUTS FOR CLOCK & REFERENCE
< 20% FSR 50 ns (typ.) SMA or BNC Parameter External Clock Frequency External Reference Clock Freq. Clock/Ref. Threshold Clock/Ref Amplitude Condition Value 10 MHz to 500 MHz 10 MHz Variable Minimum 3V to +3V 500 mV pk-pk
DIGITAL CONVERSION
Parameter Conversion Rate Aperture Uncertainty Acquisition Memory Size Resolution Differential Linearity Condition Internal Clock Value 100 S/s to 1 GS/s ± 1 ps 2 MS (8 MS for DBS907LM) 8 bits (1:256) ± 0.7 LSB
DBS907 POWER REQUIREMENTS
Supply Voltage +24 VDC 24 VDC +12 VDC 12 VDC +5 VDC 5.2 VDC 2 VDC Amps, Max. 0.0 0.0 0.1 0.0 1.8 1.2 0.2 Watts 0.0 0.0 1.2 0.0 9.0 6.3 0.4
TRIGGER (INTERNAL & EXTERNAL)
Parameter Slope Coupling Trigger Sensitivity Condition Programmable Programmable Internal Trigger External Trigger Internal Trigger Threshold Pre-Trigger Delay Post-Trigger Delay Hold Off Hold Off Resolution Bandwidth Trig. Threshold Max. Input Voltage Impedance Connector Type TV Trigger Value Positive or Negative DC or AC (50 kHz LFReject) From DC to 250 MHz: levels >15% FSR From DC to 250 MHz: levels > 500 mV FSR ± 60% 0% to 100% of data set 0 to 200 MS 1 to 65K events or 100 ns to 6.5 ms 1 event or 100 ns DC to 500 MHz 3V to +3V ± 5V DC (500 mW) 1 M or 50 BNC or SMA 525 lines/frame or 625 lines/frame
RELIABILITY
Parameter MTBF Condition Determined by the Generic Parts Count method of MIL-HDBK-217F for a ground benign environment at a temperature of 30°C Value >25,000 Hrs
GENERAL
Parameter Operating Temperature Condition 5% to 90% humidity (non-Condensing) Value 0°C to 40°C
Programmable
(3 dB) Variable Programmable Programmable
Specifications subject to change without notice
Quality Performance
The DBS907's low noise, low harmonic distortion, step response, flat frequency response and effective number of bits (ENOB) are depicted in the following plots.
FFT analysis of a pure 25 MHz sinewave, measured at 500 mV full scale, showing very low noise floor and little harmonic distortion.
Positive and negative step responses show little or no overshoot or undershoot.
Frequency response is very flat and system bandwidth reaching well beyond the specified 250 MHz.
Effective bits (top graph) are significantly higher than the minimum guaranteed performance (bottom graph).
Ordering Guide
Model Number DBS907 DBS907B DBS907LM DBS907LMB DBS907HV Output Connector SMA BNC SMA BNC BNC Memory Size 2 MS 2 MS 8 MS 8 MS 2 MS
Analogic Corporation Test & Measurement Division 8 Centennial Drive Peabody, MA 01960-7987, USA Tel: (978) 977-3000 Fax: (978) 977-6814 email: t&m_info@analogic.com www.analogic.com
Printed in U.S.A. © 2001 ANALOGIC Corporation Bulletin No. 16-100663 REV 1 9/01
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