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Part: AM79C871
Category: Communication -> Network -> Ethernet/DS1/E1 (T1/E1) -> Transceivers -> Transceiver/Repeater
Description: Pcnet(tm)-fast i i i Single-chip 10/100 MBPS Pci Ethernet Controller With Integrated PHY
Company: Advanced Micro Systems, Inc.
Datasheet: Download AM79C871 datasheet File size : 1108 kB
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PRELIMINARY
Am79C871
Quad Fast Ethernet Transceiver for 100BASE-X Repeaters (QFEXrTM)
DISTINCTIVE CHARACTERISTICS
s Compatible with IEEE 802.3u standard for 100BASE-TX and 100BASE-FX s Shared Media Independent Interface (MII) for 100BASE-X Repeater applications s Quad Integrated Digital CMOS 100 Mbps clock recovery circuits s Individual False Carrier Indication signal for repeater applications s Programmable loopback modes s Scramble and descramble feature supported for 100BASE-TX s Link Monitor and Far End Fault Indication (FEFI) s Programmable LED support s IEEE 1149.1-compatible JTAG support s Carrier Integrity Monitor (CIM) support s Direct interface to TX (MLT-3) or FX Physical Medium Dependent (PMD) devices s CMOS device features high integration and low power with a single +5 V supply in 100-pin PQFP
GENERAL DESCRIPTION
The Am79C871 Quad Fast Ethernet Transceiver for Repeaters (QFEXr) is a CMOS device that implements the Media Independent Interface (MII), Physical Coding S u bl aye r (PCS), and Physical Medium Attachment (PMA) for four 100BASE-TX/FX ports. The QFEXr device shares a single MII for the four ports. In conjunction with external PMD devices, such as MLT-3 or fiber optic transceivers, the QFEXr device suppor ts operation over two pairs of shielded twistedpair (STP) cable, two pairs of Category 5 unshielded twisted-pair (UTP) cable, or two multi-mode fibers. The functions performed by the device include encoding the MII 4-bit data (4B/5B), decoding the received code groups (5B/4B), generating carrier sense and collision detect indications, serializing code groups for t ra n s m i s s i o n , de-serializing received serial data, mapping transmit, receive, carrier sense, and collision a t the MII interface, and recovering clock from the i n c o m i n g data stream. The QFEXr device offers stream cipher scrambling and descrambling capability for 100BASE-TX applications. When transmitting, the QFEXr device receives 4-bit (nibble) wide data across the MII at 25 million nibbles per second. It then encodes the data, optionally scrambles the data, serializes the data, and transmits an NRZI data stream. When receiving, the QFEXr device receives the NRZI data stream from the network. It then recovers the clock from the NRZI data stream, de-serializes the data stream, optionally descrambles the data stream, and decodes the code groups (5B/4B). The QFEXr device communicates with the repeater device through the MII. This interface has been optimized for repeater applications and is compatible with Clause 22 of the IEEE 802.3 standard specification.
This document contains information on a product under development at Advanced Micro Devices. The information is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed product without notice.
Publication# 21170 Rev:B Amendment/0 Issue Date: November 1996
PRELIMINARY
BLOCK DIAGRAM
TX_: N[3:0] E TX_ER[3:0] CRS[3:0] RXD[3:0] COL[3:0] TXD[3:0] RX_CLK
TX_CLK
RX_DV
RX_ER
MDIO
MDC
FLS_CRS[3] Management Media Independent Interface Switching MUX FLS_CRS[2:0] /ADDR[4:2]
ENRCV[3:0]
Carrier Integrity Monitor
:
LED[3:0]
JTAG Port Control
CS/CLK_SEL ISOL ENCIM DISSCR RESET CLK
PHY Control
Transmit & Receive State Machine, 4B/5B Encoder & Decoder, Scrambler & Descrambler, FEFI Generate & Detect, Link Monitor
TMS TCK TDI TDO
Physical Data Transceiver
SDI+/-[3:0]
RX+/-[3:0]
DIS_MLT3
TX+/-[3:0]
LPBCK
21170B-1
2
Am79C871
PRELIMINARY
ORDERING INFORMATION Standard Products
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below. Am79C871 K C \W
ALTERNATE PACKAGING OPTION \W = Trimmed and formed in a tray
TEMPERATURE RANGE C = Commercial (0°C to +70°C) PACKAGE TYPE K = 100-pin Plastic Quad Flat Pack (PQR100) SPEED OPTION Not Applicable
DEVICE NUMBER/DESCRIPTION Am79C871 Quad Fast Ethernet Transceiver for 100BASE-X Repeaters (QFEXr)
Valid Combinations Am79C871 KC\W
Valid Combinations Valid Combinations list configurations planned to be suppor ted in volume for this device. Consult the local AMD sales office to confirm availability of specific valid combinations and to check on newly released combinations.
Am79C871
3
PRELIMINARY
RELATED PRODUCTS
Part No. Am7990 Am7992B Am7996 Am79C90 Am79C98 Am79C100 Am79C870 Am79C981 Am79C982 Am79C983 Am79C984A Am79C985 Am79C987 Am79C988 Am79C900 Am79C940 Am79C960 Am79C961 Am79C961A Am79C965 Am79C970 Am79C970A Am79C971B Am79C974 Serial Interface Adapter (SIA) IEEE 802.3/Ethernet/Cheapernet Transceiver CMOS Local Area Network Controller for Ethernet (C-LANCE) Twisted Pair Ethernet Transceiver (TPEX) Twisted Pair Ethernet Transceiver Plus (TPEX+) Quad Fast Ethernet Transceiver (QFEXTM) for 100BASE-X Integrated Multiport Repeater Plus (IMR+TM) basic Integrated Multiport Repeater (bIMRTM) Integrated Multiport Repeater 2 (IMR2TM) enhanced Integrated Multiport Repeater (eIMRTM) enhanced Integrated Multiport Repeater Plus (eIMR+TM) Hardware Implemented Management Information Base (HIMIBTM) Quad Integrated Ethernet Transceiver (QuIETTM) Integrated Local Area Communications Controller (ILACCTM) Media Access Controller for Ethernet (MACETM) PCnetTM-ISA Single-Chip Ethernet Controller (for ISA bus) PCnetTM-ISA+ Single-Chip Ethernet Controller for ISA (with Microsoft® Plug n' Play® Support) PCnetTM-ISA II Full Duplex Single-Chip Ethernet Controller for ISA PCnetTM-32 Single-Chip 32-Bit Ethernet Controller PCnetTM-PCI Single-Chip Ethernet Controller (for PCI bus) PCnetTM-PCI II Full Duplex Single-Chip Ethernet Controller (for PCI bus) PCnetTM-FAST Single-Chip Full-Duplex 10/100 Mbps Ethernet Controller for PCI Local Bus PCnetTM-SCSI Combination Ethernet and SCSI Controller for PCI Systems Description Local Area Network Controller for Ethernet (LANCE)
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Am79C871
PRELIMINARY
CONNECTION DIAGRAM
DVSS DVDD MDC MDIO DVDD FLS_CRS[1]/ADDR[3] DVSS ENRCV[3] ENRCV[2] ENRCV[1] ENRCV[0] CLK TX_EN[2] TX_ER[2] COL[2] CRS[2] FLS_CRS[2]/ADDR[4] DVSS RESET TMS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
CRS[1] COL[1] CS/CLK_SEL DVSS ISOL TX_ER[1] TX_EN[1] FLS_CRS[0]/ADDR[2] RXD[3] RXD[2] RXD[1] RXD[0] DVSS DVDD CRS[0] COL[0] RX_DV RX_CLK RX_ER TX_ER[0] TX_CLK TX_EN[0] TXD[0] TXD[1] TXD[2] TXD[3] DVSS DVDD LED[0] LED[1]
Am79C871 QFEXr
TCK TDI TDO DVDD TX_EN[3] TX_ER[3] COL[3] CRS[3] FLS_CRS[3] DVSS ENCIM DISSCR RX[3] DVSS_E3 RX[3]+ SDI[3] SDI[3]+ TX[3] DVDD_E3 TX[3]+ RX[2] DVSS_E2 RX[2]+ SDI[2] SDI[2]+ TX[2] DVDD_E2 TX[2]+ RX[1] DVSS_E1
LED[2] LED[3] LPBCK DIS_MLT3 DVDD_D DVSS_D TX[0]+ DVDD_E0 TX[0] SDI[0]+ SDI[0] RX[0]+ DVSS_E0 RX[0] TX[1]+ DVDD_E1 TX[1] SDI[1]+ SDI[1] RX[1]+
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21170B-2
Am79C871
5
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