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Part: ELANSC400-33
Category:
Microcontrollers
Description:
Company: Advanced Micro Devices, Inc.
Datasheet: Download ELANSC400-33 datasheet File size : 2616 kB
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Datasheet text preview:
ÉlanTMSC400 and ÉlanSC410
Single-Chip, Low-Power, PC/AT-Compatible Microcontrollers
DISTINCTIVE CHARACTERISTICS ÉlanTMSC400 and ÉlanSC410 Microcontrollers
s E86TM family of x86 embedded processors s Standard PC/AT system logic
(PICs, DMACs, timer, RTC) DOS, ROM-DOS, Windows, and industrystandard BIOS support Leverages the benefits of desktop computing environment at embedded price points
s Bidirectional parallel port with Enhanced
Offers improved time-to-market, software migration, and field-proven development tools
s Highly integrated single-chip CPU with a complete
Parallel Port (EPP) mode
s 16550-compatible UART s Infrared port for wireless communication
set of common peripherals Accelerates time-to-market with simplified hardware Low-power 0.35-micron process technology Single chip delivers smallest system form factor 33-MHz, 66-MHz, and 100-MHz operating frequencies
s Am486® CPU core
Standard and high-speed
s Keyboard interface
Matrix keyboard support with up to 15 rows and 8 columns SCP-emulation mode for PC/AT and XT keyboard support
Robust Microsoft® Windows® compatible CPU 8-Kbyte write-back cache for enhanced performance Fully static design with System Management Mode (SMM) for power savings
s Comprehensive power management unit
ÉlanSC400 Microcontroller Only
The ÉlanSC400 microcontroller includes the following ad di ti o na l features designed specifically for mobile computing applications. The ÉlanSC410 microcontroller does not include these features.
s Dual PC Card (PCMCIA Version 2.1) controller
Seven modes of operation allow fine-tuning of power requirements for maximum battery life Provides a superset of APM 1.2 features
s Glueless burst-mode
supports 8- or 16-bit data bus End-user (after-market) system expansion ExCA-compliant, 82365-register set compatible Leverages off-the-shelf card and socket services Supports DMA transfers between I/O PC cards and system DRAM
s LCD graphics controller
ROM/Flash memory/SRAM interface Reduces system cost by allowing mask ROM and Flash memory at the same time with three ROM/ Flash memory/SRAM chip selects
s Glueless DRAM controller
Allows mixed DRAM types on a per-bank basis to reduce system cost
s VESA Local (VL) bus and ISA bus interface
Supports monochrome and 4-bit color Super Twisted Nematic (STN) LCDs Unified Memory Architecture (UMA) eliminates separate video memory
Reduces time-to-market with a wide variety of offthe-shelf companion chips
© Copyright 1998 Advanced Micro Devices, Inc. All Rights Reserved. Advanced Micro Devices, Inc. ("AMD") reserves the right to discontinue its products, or make changes in its products, at any time without notice. The information in this publication is believed to be accurate at the time of publication, but AMD makes no representations or warranties with respect to the accuracy or completeness of the contents of this publication or the information contained herein, and reserves the right to make changes at any time, without notice. AMD disclaims responsibility for any consequences resulting from the use of the information included in this publication. This publication neither states nor implies any representations or warranties of any kind, including but not limited to, any implied warranty of merchantability or fitness for a particular purpose. AMD's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support or sustain life, or in any other application in which the failure of AMD's product could create a situation where personal injury, death, or severe property or environmental damage may occur. AMD assumes no liability whatsoever for claims associated with Publication# 21028 Rev: B Amendment/0 the sale or use (including the use of engineering samples) of AMD products except as provided in AMD's Terms and Conditions Issue Date: December 1998 of Sale for such product.
GENERAL DESCRIPTION
The ÉlanTMSC400 and ÉlanSC410 microcontrollers are the among the latest in a series of E86TM family m i c ro co n t r o l l e r s , which integrate proven x86 CPU cores with a comprehensive set of on-chip peripherals in a 0.35-micron process. The ÉlanSC400 and ÉlanSC410 microcontrollers c o m b i n e a 32-bit, low-voltage Am486 CPU with a complete set of PC/AT-compatible peripherals, along w i t h the power management features required for battery operation. Leveraging the benefits of the x86 desktop computing environment, the ÉlanSC400 and ÉlanSC410 microcontrollers integrate all of the common logic and I/O functionality associated with a PC/AT computing system into a single device, eliminating the need for multiple peripheral chips. Fully integrated PC/AT-compatible periphera l s include two 8259A-compatible programmable interrupt controllers (PICs), two 8237A-compatible DMA controllers, an 8254-compatible timer, a 16550 UART, an IrDA controller, VL-bus and ISA bus controllers, a re a l -t i m e clock (RTC), and Enhanced Parallel Port (EPP) mode for the parallel port. With its low-voltage Am486® CPU core and ultra-small form factor, the ÉlanSC400 microcontroller is highly opt i m i z e d for mobile computing applications. The ÉlanSC410 microcontroller is targeted specifically for embedded systems. A feature comparison of the two microcontrollers is shown in Table 1 on page 3. The ÉlanSC400 and ÉlanSC410 microcontrollers use the industry-standard 486 microprocessor instruction set. All software written for the x86 architecture family i s compatible with the ÉlanSC400 and ÉlanSC410 microcontrollers. The ÉlanSC400 and ÉlanSC410 microcontrollers are based on a fully static design and include an advanced p o w e r management unit. Operating voltages are 2.7 V3.3 V with 5-V-tolerant I/O pads. Orderable in both 33-MHz, 66-MHz, and 100-MHz peak processor s p e e d s, the product is available in the ultra-small 292 ball grid array (BGA) package.
ORDERING INFORMATION
AMD standard products are available in several packages and operating ranges. The order number (Valid Combination) is formed by a combination of the elements below.
ELANSC400 33 A C TEMPERATURE RANGE C = Commercial For 33 and 66 MHz: TCASE = 0°C to +95°C For 100 MHz: TCASE = 0°C to +85°C I = Industrial For 33 and 66 MHz, TCASE = 40°C to +95°C PACKAGE TYPE A = 292-pin BGA (Ball Grid Array) SPEED OPTION 33 = 33 MHz 66 = 66 MHz 100 = 100 MHz DEVICE NUMBER/DESCRIPTION ÉlanSC400 microcontroller ÉlanSC410 microcontroller Valid Combinations ELANSC40033 ELANSC40066 ELANSC400100 ELANSC41033 ELANSC41066 ELANSC410100 AC AC AC, AI AC, AI Valid Combinations
Valid Combinations list configurations planned to be supported in volume for this device. Consult the local AMD sales office to confirm availability of specific valid c o m b i n a t i o n s and to check on newly released combinations.
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ÉlanTMSC400 and ÉlanSC410 Microcontrollers Data Sheet
Table 1.
Product Comparison--ÉlanSC400 and ÉlanSC410 Microcontrollers
ÉlanSC410 Am486 CPU 8-Kbyte Write-Back Yes No 16, 32 bit 8, 16 bit No 32 bit No Yes Yes Yes Yes Yes 8, 16, 32 bit 3 x 64 Mbyte 3 Yes Yes 4 16, 32 bit 64 Mbyte Yes ROM-mappable Yes Yes Yes 2 8, 16 bit 7 2 2 8 Yes 16550-compatible Yes Yes Yes 32 Yes No ÉlanSC400 Am486 CPU 8-Kbyte Write-Back Yes No 16, 32 bit 8, 16 bit No 32 bit No Yes Yes Yes Yes Yes 8, 16, 32 bit 3 x 64 Mbyte 3 Yes Yes 4 16, 32 bit 64 Mbyte Yes ROM-mappable Yes Yes Yes 2 8, 16 bit 7 2 2 8 Yes 16550-compatible Yes Yes Yes 32 Yes Yes 2 Yes Yes Yes Yes Yes Yes 292 BGA 2.73.3 V 3.3 V 5V 33, 66, 100 MHz
Feature Core CPU L1 Cache System management mode (SMM) Floating-point unit Data Bus ISA Interface ISA bus mastering VESA Local Bus VL bus mastering Power Management Mode timers Activity detection SMI/NMI generation Battery monitoring On-Chip ROM Interface Width Size (total ROM space) ROM chip selects Burst-mode support Support for SRAM as ROM address space On-Chip DRAM Controller Banks Width Size (total of all banks) EDO support Support for SRAM as main memory Integrated PC/AT-Compatible Peripherals Programmable timer (8254-compatible) Real-time clock (146818A-compatible) Port B and Port 92h I/O registers Cascaded DMA Controllers (8237A) Width Total number of channels External channels Cascaded Interrupt Controllers (8259) External IRQ signals Bidirectional Parallel Port with EPP Mode Serial Port (UART) Keyboard Interface Support for external 8042 SCP XT interface Matrix scanned with SCP emulation General-Purpose Input/Output Signals Infrared (IrDA) Port PC Card Controller Sockets PCMCIA 2.1-compliant 82365-compatible LCD Graphics Controller Programmable clock frequency Unified memory architecture (UMA) JTAG Support Pin Count and Package VCC: CPU core On-chip peripheral logic I/O tolerance (designated pins) Processor Clock Rate
No
Yes 292 BGA 2.73.3 V 3.3 V 5V 33, 66, 100 MHz
ÉlanTMSC400 and ÉlanSC410 Microcontrollers Data Sheet
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BLOCK DIAGRAM--ÉlanSC400 MICROCONTROLLER
ÉlanSC400 Microcontroller Addr Data Am486® CPU Memory Management Unit
System Address Bus
Address Decoder Addr Dual DMA Controllers 8237 Data Steering Data Bus
Power GPIOs Management Unit Clock I/O Clock Generation Real-Time Clock Boundary Scan AT Port Logic Timer 8254 Dual Interrupt Controllers 8259 Socket A Ctrl GPIOs or Parallel Port or PC Card Socket B PC Card Controller GPIOs EPP Parallel Port UART 16550 Infrared Port GPIOs GPIOs Internal Bus
LCD Graphics Controller Graphics or Local Bus Controller Local Bus Controller
32-kHz Crystal
System Arbiter GPIOs
DRAM Control Memory Controller ROM Control DRAM Control or Keyboard Rows GPIOs or Keyboard Rows Columns or XT Keyboard ISA Control or Keyboard Rows ISA Control ISA Control or GPIOs
Keyboard Interface: Matrix/XT/SCP
Serial Port
ISA Bus Controller
Infrared
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ÉlanTMSC400 and ÉlanSC410 Microcontrollers Data Sheet
BLOCK DIAGRAM--ÉlanSC410 MICROCONTROLLER
ÉlanSC410 Microcontroller Addr Data Am486® CPU Memory Management Unit
System Address Bus
Address Decoder Addr Dual DMA Controllers 8237 Data Steering Data Bus
Power GPIOs Management Unit Clock I/O Clock Generation Real-Time Clock Boundary Scan AT Port Logic Timer 8254 Dual Interrupt Controllers 8259 GPIOs or Parallel Port EPP Parallel Port Serial Port UART 16550 Infrared Port GPIOs Memory Controller Internal Bus
32-kHz Crystal
Local Bus Controller
Local Bus Controller
System Arbiter GPIOs DRAM Control ROM Control DRAM Control or Keyboard Rows GPIOs Keyboard Interface: Matrix/XT/SCP GPIOs or Keyboard Rows Columns or XT Keyboard ISA Control or Keyboard Rows ISA Control ISA Control or GPIOs
ISA Bus Controller GPIOs
Infrared
ÉlanTMSC400 and ÉlanSC410 Microcontrollers Data Sheet
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