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Part: PHB3055E
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Philips Semiconductors
Preliminary specification
TrenchMOSTM transistor
PHP3055E, PHB3055E, PHD3055E
FEATURES
· 'Trench' technology · Very low on-state resistance · Fast switching · High thermal cycling performance · Low thermal resistance
SYMBOL
d
QUICK REFERENCE DATA VDSS = 55 V ID = 10.5 A
g
RDS(ON) 150 m (VGS = 10 V)
s
GENERAL DESCRIPTION
N-channel enhancement mode, field-effect power transistor in a plastic envelope using 'trench' technology. The device has very low on-state resistance. It is intended for use in dc to dc converters and general purpose switching applications. The PHP3055E is supplied in the SOT78 (TO220AB) conventional leaded package. The PHB3055E is supplied in the SOT404 surface mounting package. The PHD3055E is supplied in the SOT428 surface mounting package.
PINNING
PIN 1 2 3 tab DESCRIPTION gate drain 1 source
SOT78 (TO220AB)
tab
SOT404
tab
SOT428
tab
2
1 23
2
1
3
1
3
drain
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL PARAMETER VDSS VDGR VGS ID IDM PD Tj, Tstg Drain-source voltage Drain-gate voltage Gate-source voltage Continuous drain current Pulsed drain current Total power dissipation Operating junction and storage temperature CONDITIONS Tj = 25 °C to 175°C Tj = 25 °C to 175°C; RGS = 20 k Tmb = 25 °C Tmb = 100 °C Tmb = 25 °C Tmb = 25 °C MIN. - 55 MAX. 55 55 ± 20 10.5 7.6 42 36 175 UNIT V V V A A A W °C
1 It is not possible to make connection to pin:2 of the SOT404 or SOT428 packages. May 1999 1 Rev 1.100
Philips Semiconductors
Preliminary specification
TrenchMOSTM transistor
PHP3055E, PHB3055E, PHD3055E
THERMAL RESISTANCES
SYMBOL PARAMETER Rth j-mb Rth j-a Thermal resistance junction to mounting base Thermal resistance junction to ambient CONDITIONS TYP. SOT78 package, in free air SOT428 and SOT404 package, pcb mounted, minimum footprint 60 50 MAX. 4.17 UNIT K/W K/W K/W
ELECTRICAL CHARACTERISTICS
Tj= 25°C unless otherwise specified SYMBOL PARAMETER V(BR)DSS VGS(TO) RDS(ON) gfs IGSS IDSS Qg(tot) Qgs Qgd td on tr td off tf Ld Ld Ls Ciss Coss Crss Drain-source breakdown voltage Gate threshold voltage Drain-source on-state resistance Forward transconductance Gate source leakage current Zero gate voltage drain current Total gate charge Gate-source charge Gate-drain (Miller) charge Turn-on delay time Turn-on rise time Turn-off delay time Turn-off fall time Internal drain inductance Internal drain inductance Internal source inductance Input capacitance Output capacitance Feedback capacitance CONDITIONS VGS = 0 V; ID = 0.25 mA; Tj = -55°C VDS = VGS; ID = 1 mA Tj = 175°C Tj = -55°C VGS = 10 V; ID = 5.5 A Tj = 175°C VDS = 25 V; ID = 5.5 A VGS = ±10 V; VDS = 0 V VDS = 55 V; VGS = 0 V; Tj = 175°C ID = 5 A; VDD = 44 V; VGS = 10 V MIN. 55 50 2.0 1.0 4 TYP. MAX. UNIT 3.0 120 250 10 10 0.05 6 1.6 2.4 6 23 18 18 3.5 4.5 7.5 190 65 32 4.0 4.4 150 315 100 10 500 16 35 30 30 250 80 45 V V V V V m m S nA µA µA nC nC nC ns ns ns ns nH nH nH pF pF pF
VDD = 30 V; ID = 5 A; VGS = 10 V; RG = 10 Resistive load Measured from tab to centre of die Measured from drain lead to centre of die (SOT78 package only) Measured from source lead to source bond pad VGS = 0 V; VDS = 25 V; f = 1 MHz
May 1999
2
Rev 1.100
Philips Semiconductors
Preliminary specification
TrenchMOSTM transistor
PHP3055E, PHB3055E, PHD3055E
REVERSE DIODE LIMITING VALUES AND CHARACTERISTICS
Tj = 25°C unless otherwise specified SYMBOL PARAMETER IS ISM VSD trr Qrr Continuous source current (body diode) Pulsed source current (body diode) Diode forward voltage Reverse recovery time Reverse recovery charge CONDITIONS MIN. IF = 11 A; VGS = 0 V IF = 11 A; -dIF/dt = 100 A/µs; VGS = 0 V; VR = 30 V TYP. MAX. UNIT 0.95 34 57 11 44 1.2 A A V ns nC
AVALANCHE LIMITING VALUE
SYMBOL PARAMETER WDSS CONDITIONS MIN. MAX. 10 UNIT mJ Drain-source non-repetitive ID 10 A; VDD 25 V; VGS = 10 V; unclamped inductive turn-off RGS = 50 ; Tmb = 25 °C energy
May 1999
3
Rev 1.100
Others parts begin by ph
PH-1 PH-2 PH-3 PH-4 PH-5
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