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Part: M27C4001-80X
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M27C4001
4 Megabit (512K x 8) UV EPROM and OTP EPROM
FAST ACCESS TIME: 55ns LOW POWER "CMOS" CONSUMPTION: Active Current 30mA a t 5MHz Standby Current 100µA PROGRAMMING VOLTAGE: 12.75V ELECTRONIC SIGNATURE for AUTOMATED PROGRAMMING PROGRAMMING TIMES of AROUND 48sec. (PRESTO II ALGORITHM)
32
1
FDIP32W (F)
LCCC32W (L)
32
DESCRIPTION The M27C4001 is a high speed 4 Megabit UV erasable and electrically programmable EPROM ideally suited for microprocessor systems requiring large programs. It is organised as 524,288 by 8 bits. The Window Ceramic Frit-Seal Dual-in-Line and Leadless Chip Carrier packages have t ransparent lids which allow the user to expose the chip to ultraviolet light to erase the bi t pattern. A new pattern can then be written to the device by following the programming procedure. For applications where the content is programmed only one time and erasure is not required, the M27C4001 is offered in both Plastic Dual-in-Line, Plastic Leaded Chip Carrier and Plastic Thin Small Outline packages .
1
PDIP32 (B)
PLCC32 (C)
TSOP32 (N) 8 x 20mm
Figure 1. Logic Diagram
VCC VPP
19
8 Q0-Q7
Table 1. Signal Names
A0 - A18 Q0 - Q7 E G VPP VCC VSS June 1996 Address Inputs
A0-A18
E
Data Outputs Chip Enable Output Enable Program Supply Supply Voltage Ground
M27C4001
G
VSS
AI00721B
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M27C4001
Figure 2A. DIP Pin Connections
Figure 2B. LCC Pin Connections
VPP A16 A15 A12 A7 A6 A5 A4 A3 A2 A1 A0 Q0 Q1 Q2 VSS
1 2 3 4 5 6 7 8 M27C4001 9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
VCC A18 A17 A14 A13 A8 A9 A11 G A10 E Q7 Q6 Q5 Q4 Q3
A7 A6 A5 A4 A3 A2 A1 A0 Q0
A 12 A 15 A 16 VPP VCC A 18 A 17 1 32 A14 A13 A8 A9 A11 G A10 E Q7 9 M27C4001 25 17 Q1 Q2 VSS Q3 Q4 Q5 Q6
AI00723
AI00722
Figure 2C. TSOP Pin Connections
A11 A9 A8 A13 A14 A17 A18 VCC VPP A16 A15 A12 A7 A6 A5 A4
1
32
8 9
M27C4001 (Normal)
25 24
16
17
AI01155B
G A10 E Q7 Q6 Q5 Q4 Q3 VSS Q2 Q1 Q0 A0 A1 A2 A3
DEVICE OPERATION The modes of operations of the M27C4001 are listed in the Operating Modes table. A single power supply is required in the read mode. All inputs are TTL le vels except for Vpp and 12V on A9 for Electronic Signature. Read Mode The M27C4001 has two control functions, both of which must b e logically active in order to obtain data a t the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins, independent of de vice selection. Assuming that the addresses are stable, the address access time (tAVQV) is equal to the delay from E to output (tELQV). Data is available at the output after a delay of tGLQV from the falling edge of G, assuming that E has been low and the addresses have been stable for at least tAVQV-tGLQV. Standby Mode The M27C4001 has a standby mode which reduces the active current from 30mA to 100µA. The M27C4001 is placed in the standby mode by applying a CMOS high signal to the E input. When in the standby mode, the outputs are in a high impedance state, independent of the G input.
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M27C4001
Table 2. Absolute Maximum Ratings (1)
Symbol TA TBIAS TSTG VIO
(2)
Parameter Ambient Operating Temperature Temperature Under Bias Storage Temperature Input or Output Voltages (except A9) Supply Voltage A9 Voltage Program Supply Voltage
Value 40 to 125 50 to 125 65 to 150 2 to 7 2 to 7 2 to 13.5 2 to 14
Unit °C °C °C V V V V
VCC VA9
(2)
VPP
Notes: 1. E xcept for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the SGS-THOMSON SURE Program and other relevant quality documents. 2. Mini mum DC voltage on Input or Output is 0.5V with possible undershoot to 2.0V for a period less than 20ns. M aximum DC voltage on Output is VCC +0.5V with possible overshoot to VCC +2V for a period less than 20ns.
Table 3. Operating Modes
Mode Read Output Disable Program Verify Program Inhibit Standby Electronic Signature
Note: X = VIH or VIL, VID = 12V ± 0.5V
E VIL VIL VIL Pulse VIH VIH VIH VIL
G VIL VIH VIH VIL VIH X VIL
A9 X X X X X X VID
VPP VCC or VSS VCC or VSS VPP VPP VPP VCC or VSS VCC
Q0 - Q7 Data Out Hi-Z Data In Data Out Hi-Z Hi-Z Codes
Table 4. Electronic Signature
Identifier Manufacturer's Code Device Code A0 VIL VIH Q7 0 0 Q6 0 1 Q5 1 0 Q4 0 0 Q3 0 0 Q2 0 0 Q1 0 0 Q0 0 1 Hex Data 20h 41h
Two Line Output Control Because EPROMs are usually used in larger memory arrays, this product features a 2 line control function which accommodates the use of multiple memory connection. The two line control function allows: a. the lowest possible memory power dissipation, b. complete assurance that output bus content ion will not occur.
For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the REA D line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device.
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