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Part: 09C8C10
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Datasheet: Download 09C8C10 datasheet File size : 431 kB
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10 dB
V23809-C8-C10 8 dB V23809-C8-C11
Multimode 1300 nm LED ATM 155/194 MBd Transceiver
Dimensions in (mm) inches
View Z
(Lead cross section and standoff size)
(10 max) (PC board .393 max thickness) (2) .080 (1 ±0.1) .04 ±.039
(3 ±0.2) .118 ±.008 PC board Optical Centerline
(8.6 max) .170 max
9x (0.8 ±0.1)
.031 ±.004 5.2 .205
11x
(0.63 ±0.2) .025 ±.008
(3.8 max) (0.7 ±0.1) .150 max .028 ±.004 0.3 M A .012 M A
2x
0.1 M .004 M
(0.6 ±0.1) .024 ±.004 (0.3 ±0.02) .012 ±.001
9x
q
11x
0.1 M .004 M
Z
q
q q q
(14 0.05) (2.8 max) .055 ±.002 .110 max
123456789
q
q
8x 2.54=20.32 8x .100=.800
q q q
0.3 M A .012 M A
q
(25.25 ±0.05) .994 ±.002 8x 2.54=20.32 8x .100=.800
Rx
DUPLEX SC RECEPTACLE
q q q q q q q
12.7 .500 Tx
(2.54) .100 (2.54) .100
20.32 .800 Footprint
(19 ±0.1) 2x .075 ±.004
(Top view)
20.32 .800
(15.88 ±0.5) .625 ±.020
(11 max) .433 max
(38.6 ±0.15) 1.52 ±.006
FEATURES · Fully compliant with all major standards · Compact integrated transceiver unit with duplex SC receptacle · Single power supply with 3.0 V to 5.5 V range · Extremely low power consumption < 0.7 W at 3.3 V · Excellent EMI performance · PECL 100K compatible differential inputs and outputs · System optimized for 62.5/50 µm graded index fiber · Industry standard multisource footprint · Very low profile for high slot density · Wave solderable and washable with process plug · Test board available · UL-94 V-0 certified · ESD Class 2 per MIL-STD 883 Method 3015 · Compliant with FCC (Class B) and EN 55022 · For distances of up to 2 km
APPLICATIONS · ATM switches/bridges/ routers · High speed computer links · Local area networks · High definition digital television · Switching systems
Maximum Ratings (Absolute maximum stress)
Exceeding any one of these values may destroy the device immediately. However, the electro-optical characteristics described in the following tables are only valid for use under the recommended operating conditions. Package Power Dissipation (PD) 5 V .......1 W 3.3 V ..........0.7 W Supply Voltage (VCCVEE) ............ 0.5 to 7 V Data Input Levels (VIN) PECL...... VEEVCC V Differential Data Input Voltage.........3 V Operating Case Temperature......... 0 to 85°C Storage Ambient temperature ......... 40°C to 85°C Soldering Conditions Temp/Time (Tsold) MIL-STD 883C, Method 2003 ..... 270/10°C/s. ESD Resistance (all pins to VEE, Human Body) .......... 1.5 kV
928
DESCRIPTION This data sheet describes the Siemens ATM Transceiver, which belongs to the Siemens Multistandard Transceiver Family. It is fully compliant with the proposed Asynchronous Transfer Mode ATM OC-3 proposed standard. ATM is being developed because of the need for multimedia applications, including real-time transmission. The data rate is scalable and the ATM protocol is the basis of the broadband public networks being standardized in the International Telegraph and Telephone Consultative Committee (CCITT). ATM can also be used in local private applications. The Siemens low cost ATM transceiver is a single unit comprised of a transmitter, a receiver and an SC receptacle. This frees the customer from many alignment and PC board layout concerns. The modules are designed for low cost applications. The inputs/outputs are PECL compatible and the unit operates from 3.0 V to 5.5 V power supply. As an option, the data output stages can be switched to static levels during absence of light, as indicated by the Signal Detect function. It can be directly interfaced with available chipsets. The excellent performance of the Siemens Multistandard Transceiver Family is the result of long term experience. The reliability of our modules is proven by high volume production.
Recommended Operating Conditions
Parameter Ambient Temperature Power Supply Voltage Supply Current 3.3 V Supply Current 5 V(1) Transmitter Data Input High Voltage Data Input Low Voltage Threshold Voltage Input Data Rise/Fall, 2080% Data High Receiver Output Current Input duty Cycle Distortion Input Data Dependent Jitter Input Random Jitter Input Center Wavelength Electrical Output Load(3) lo tDCD tDDj tRj lC RL 1260 50 0.76 1380 nm 25 1.0 mA ns Time(2) VIHVCC VILVCC VbbVCC t ,t ton
RF
Sym. TC
Min. 0
Typ.
Max. 70 5.5 190 210
Units °C V mA
VCCVEE 3 ICC
1165 1810 1420 0.4
880 1475 1240 1.3 1000
mV
ns
Notes: 1. For Vcc-Vee (min., max.) 50% duty cycle. The supply current (Icc2 + Icc3) does not include the load drive current (Icc1). Add max. 45 mA for the three outputs. Load is 50 into VCC 2V 2. To maintain good LED reliability, the device should not be held in the ON-state for more than the specified time. Normal operation should be done with 50% duty cycle 3. To achieve proper PECL output levels the 50 termination should be done to VCC V. For correct termination see the application note.
Reliability (Qualification Results)
Test Temperature (HTB) Reference Temperature Duration of HTB Test Activation Energy Confidence Level Number of tested modules 85°C / 358K 25°C / 298K >5000 hrs 0.7 eV 60 % >120
929
V23809-C8C10/11, 1300 nm ATM 155/194 MBd Transceiver
Transmitter Electro-Optical Characteristics
Transmitter Data Rate Sym. DR 20 16 Min. Typ. Max. 170 14 Units MBaud dBm
Receiver Electro-Optical Characteristics
Receiver Data Rate Sensitivity (Average Power)(1) Sensitivity (Average Power) Center(2) Saturation (Average Power)(2) PSAT tDCD tDJ tRJ PSDA PSDD 42.5 45 30 31.5 dB 1620 mV 880 1.3 40 ns dBm 14 Sym. Dr PIN Min. 5 32 35.5 11 1 1 ns Typ. Max. 170 30 Units MBaud dBm
Launched Power (Aver- Po age) into 62.5µm Fiber for C8C10(1, 4) Launched Power (Average) into 62.5µm Fiber for C8C11(1, 4) Center Wavelength(2, 4) C Spectral Width (FWHM)(3, 4) Output Rise/Fall Time, 1090%(4, 5) t ,t
22
17
1270
1360 170
nm
Duty Cycle Distortion(3, 6) Deterministic Jitter(4, 6)
RF
0.6
2.5 0.03 10 0.6 0.3
ns dB/°C % ns
Random
Jitter(5, 6)
Temperature Coefficient TCp of Optical Optput Power Extinction Ratio (dynamic)(4, 6) Duty Cycle Distortion(7) Data Dependent Jitter(7) Random Jitter(7) ER tDCD tDDJ tRJ
Signal Detect Assert Level(7) Signal Detect Deassert Level(8) Signal Detect Hysteresis Output LO Voltage(9) Output HI Voltage(9)
PSDA 1.5 PSDD VOL VCC VOH VCC t ,t
RF
1810 1025
0.6 Output Data Rise/Fall Time, 2080% Output SD Rise/Fall Time, 2080%
Notes 1. Measured at the end of 5 meters of 62.5/125/0.275 graded index fiber using calibrated power meter and a precision test ferrule. Cladding modes are removed. Values valid for EOL and worst-case temperature. 2. Center wavelength is defined as the midpoint between the two 50% levels of the optical spectrum of the LED. 3. Spectral width (full width, half max) is defined as the difference between 50% levels of the optical spectrum of the LED. 4. The input data pattern is a 12.5 MHz square wave pattern. 5. 10 to 90% levels. Measured using the 12.5 MHz square wave pattern with an optoelectronic measurement system (detector and oscilloscope) having 3 dB bandwidth ranging from less than 0.1 MHz to more than 750 MHz. 6. Extinction Ratio is defined as PL/PH x 100%. Measurement system as in Note 5. 7. The test method is not yet mentioned in the ATM standard draft. The FDDI test routines apply as long as these are not changed.
Notes 1. For a bit error rate ( BER ) of less than 1x10E-12 over a receiver eye opening of least 1.5 ns. Measured with a 27-1 PRBS at 194 MBd. 2. For a BER of less than 1x10E-12. Measured in the center of the eye opening with a 27-1 PRBS at 194 MBaud. 3. Measured at an average optical power level of -20 dBm with a 62.5 MHz square wave. 4. Measured at an average optical power level of -20 dBm . 5. Measured at -33 dBm average power. 6. All jitter values are peak-to-peak. RX output jitter requirements are not considered in the ATM standard draft. In general the same requirements as for FDDI are met. 7. An increase in optical power through the specified level will cause the SIGNAL detect output to switch from a LO state to a HI state. 8. A decrease in optical power through the specified level will cause the SIGNAL detect output to switch from a HI state to a LO state. 9. ECL 100K compatible. Load is 50 into VCC 2V. Measured under DC conditions. For dynamic measurements a tolerance of 50 mV should be added for VCC=5 V.
930
V23809-C8C10/11, 1300 nm ATM 155/194 MBd Transceiver
PIN Description
Pin Name RxVEE RD RDn RxSD RxVCC TxVCC TxDn TxD TxVEE Case Tx Ground Support Power Supply Not Connected RX Signal Detect Rx +5 V Tx +5 V Tx Input Data PECL Input Rx Ground Rx Output Data Level/Logic Power Supply PECL Output Pin# 1 2 3 PECL-Output active high 4 Power Supply 5 6 7 8 9 S1/S2 Inverted transmitter input data Transmitter input data Negative power supply, normally ground Support stud, not connected Description Negative power supply, normally ground Receiver output data Inverted receiver output data High level on this output shows there is an optical signal. Positive power supply, +5V
APPLICATION NOTE FOR 1X9 PIN ROW TRANSCEIVER Figure 1. Schematic
VCCTX 9 82R 82R 1 82R VCCRX VCCRX VCC L1
R1
R3
R5
82R
C1/3=4700 nF (optional) C2/4=4700 nF L1/2=15000 nH (L2 is optional)
GND
GND
VCC
R7
C1 C2 VCCTX
TXD TXDN
130R 130R VCC-TX 200R 130R 130R
RD RDN SD
R2 R4
VCC-RX
GND L2
GND
R9
R8
C3 C4
R in Ohm R1/3 R2/4 R5/7 R6/8 R9=200 Ohm
5V 82 130 82 130
4V 100 100 100 100
3.3 V 127 83 127 83
R6 GND GNDGND GND GND
GNDGND
Transceiver
The power supply filtering is required for good EMI performance. Use short tracks from the inductor L1/L2 to the module VCC-RX/VCC-TX.
A GND plane under the module is recommended for good EMI and sensitivity performance.
931
V23809-C8C10/11, 1300 nm ATM 155/194 MBd Transceiver
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